X-Authentication-Warning:	delorie.com: mail set sender to geda-user-bounces using -f
X-Recipient:	geda-user AT delorie DOT com
Date:	Wed, 18 Jan 2017 08:17:30 +0100 (CET)
X-X-Sender:	igor2 AT igor2priv
To:	geda-user AT delorie DOT com
X-Debug:	to=geda-user AT delorie DOT com from="gedau AT igor2 DOT repo DOT hu"
From:	gedau AT igor2 DOT repo DOT hu
Subject:	Re: [geda-user] [pcb] why no clearpoly on silk
In-Reply-To:	<alpine.DEB.2.00.1701180741180.7286@igor2priv>
Message-ID:	<alpine.DEB.2.00.1701180813230.7286@igor2priv>
References:	<alpine DOT DEB DOT 2 DOT 00 DOT 1701180741180 DOT 7286 AT igor2priv>
User-Agent:	Alpine 2.00 (DEB 1167 2008-08-23)
MIME-Version:	1.0
Reply-To:	geda-user AT delorie DOT com
Errors-To:	nobody AT delorie DOT com
X-Mailing-List:	geda-user AT delorie DOT com
X-Unsubscribes-To:	listserv AT delorie DOT com

Hi all,

sligtly related to the disappearing silk poly: we do not let polygon 
clearance happen on silk. It's disabled even if both clearline and 
clearpoly are set. Does anyone remember what was the reason for 
this? Is it only that it "doesn't seem practical"? If so, why don't we 
just let the user control this with those flags we already have?

(The relation is that the bug can not be reproduced if the clearpoly flag 
is not set on the silk poly.)

I'm asking this because I am planning to remove this limitation in 
pcb-rnd and let users do clearpoly in whatever layer they want to.

Regards,

Igor2

- Raw text -