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Subject:	Re: [geda-user] A workflow for gEDA PCB font symbol/glyph creation
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Date:	Wed, 14 Dec 2016 10:24:42 -0600
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On 12/13/2016 06:45 PM, Erich Heinzle (a1039181 AT gmail DOT com) [via geda-user AT delorie DOT com] wrote:
> I hadn't turned my mind to applications involving circuit trace
> analysis, but it is an intriguing idea.

Recognizing traces could enable reuse much more than is commonly easy now. One would start with scans
or photographs of existing boards.  GIMP could be used to "square up" a photo.

Next recognize circuitry as glyphs that are compatible with traces.  Then reduce the noise
in the traces and pads.  Then select various objects based on heuristics and make them all
the same size when they should be -- kind of like "snapping to grid" but for sizes of pads, vias also.

This kind of approach might even work with components still attached -- some vias might only show half their round areas,
or have through hole parts covering some of them.  Better yet, melt off and cut off components first.

You could get a layout by associating footprints with pads.  Then do push/shove routing to a grid and you've made
an old circuit or new-but-not-documented breakout board reusable.

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