Mail Archives: geda-user/2016/08/02/17:03:40
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On Aug 2, 2016, at 4:01 PM, Ouabache Designworks (z3qmtr45 AT gmail DOT com) =
[via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
>=20
>=20
> On Tue, Aug 2, 2016 at 11:56 AM, John Doty <jpd AT noqsi DOT com> wrote:
>=20
> On Aug 2, 2016, at 2:18 PM, Ouabache Designworks (z3qmtr45 AT gmail DOT com) =
[via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
>=20
>>=20
>>=20
>> On Tue, Aug 2, 2016 at 10:27 AM, John Doty <jpd AT noqsi DOT com> wrote:
>>=20
>> On Aug 2, 2016, at 11:55 AM, Ouabache Designworks =
(z3qmtr45 AT gmail DOT com) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> =
wrote:
>>=20
>>> This group has shown almost no interest in features that are needed =
by IC designers if they are not also needed by PCB designers.
>>=20
>> What do you imagine IC designers need? I design mixed-signal ASICs in =
gschem, and do not perceive any limits. Just another application for a =
complete, general purpose network topology editor.
>>=20
>> John Doty Noqsi Aerospace, Ltd.
>> http://www.noqsi.com/
>> jpd AT noqsi DOT com
>>=20
>>=20
>> How about libraries that you can download that don't have naming =
collisions with other libraries?
>=20
> Since you have complete control of your library path, why is this a =
problem? Just put together the library *your* project needs. No big =
deal. Certainly not something that requires a new *feature*.
>=20
>=20
> So I need part A from Library foo and part B from library bar when =
both libs have both parts. How do I set up the search path?
The way I do it is to have a project symbol directory. I copy the =
necessary symbols from libraries into there. It=92s safer to keep =
specialized symbols bundled with the project anyway. Libraries get =
revised.
>=20
>=20
>>=20
>> How about complete hierarchical design support with uniquification?
>=20
> I=92m not sure what your problem is. My ASICs are hierarchical (of =
course).
>=20
> When I descend down into a component instance then I want to see the =
schematic using all the elaborated values instead of the attribute =
names.
Cute, but how much time would this actually save? (I hate cute, =
time-wasting =93features=94) In any case, you could probably do this =
with gschem scripting in Guile.
>=20
>=20
>=20
>>=20
>> How about Busses? IC's need support for wires,vectors and busses. =
Gschem does wires with some graphic support for vectors but nothing for =
busses.
>=20
> Need? Maybe they would be nice, but I haven=92t really missed them. =
Mostly you want them in complex digital parts, I think. If that was the =
kind of chip I was doing, I=92d do those straight in HDL, not draw them =
in gschem. In any case, there=92s nothing preventing you giving a net a =
name that describes a bus, and dealing with that downstream.
>=20
>=20
>=20
> Wires and vectors have inputs and outputs. Busses have masters and =
slaves. You need to support bundling wires,vectors and busses into =
bigger busses, passing it up and down hierarchies and then splitting =
everything back apart at the end.
Analogues of some of that are in my experimental gnetlist back end for =
drawing Makefiles. It=92s just a matter of a little Guile scripting, =
really. =
http://www.delorie.com/archives/browse.cgi?p=3Dgeda-user/2015/10/12/13:53:=
03. =93Net=94 lines don=92t need to know much about what they represent =
when they can learn from the pins connected to them.
John Doty Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd AT noqsi DOT com
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<html><head><meta http-equiv=3D"Content-Type" content=3D"text/html =
charset=3Dwindows-1252"></head><body style=3D"word-wrap: break-word; =
-webkit-nbsp-mode: space; -webkit-line-break: =
after-white-space;"><br><div><div>On Aug 2, 2016, at 4:01 PM, Ouabache =
Designworks (<a href=3D"mailto:z3qmtr45 AT gmail DOT com">z3qmtr45 AT gmail DOT com</a>)=
[via <a href=3D"mailto:geda-user AT delorie DOT com">geda-user AT delorie DOT com</a>] =
<<a href=3D"mailto:geda-user AT delorie DOT com">geda-user AT delorie DOT com</a>>=
wrote:</div><br class=3D"Apple-interchange-newline"><blockquote =
type=3D"cite"><div dir=3D"ltr"><br><div class=3D"gmail_extra"><br><div =
class=3D"gmail_quote">On Tue, Aug 2, 2016 at 11:56 AM, John Doty <span =
dir=3D"ltr"><<a href=3D"mailto:jpd AT noqsi DOT com" =
target=3D"_blank">jpd AT noqsi DOT com</a>></span> wrote:<br><blockquote =
class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1px #ccc =
solid;padding-left:1ex"><div style=3D"word-wrap:break-word"><br><div><span=
class=3D""><div>On Aug 2, 2016, at 2:18 PM, Ouabache Designworks (<a =
href=3D"mailto:z3qmtr45 AT gmail DOT com" =
target=3D"_blank">z3qmtr45 AT gmail DOT com</a>) [via <a =
href=3D"mailto:geda-user AT delorie DOT com" =
target=3D"_blank">geda-user AT delorie DOT com</a>] <<a =
href=3D"mailto:geda-user AT delorie DOT com" =
target=3D"_blank">geda-user AT delorie DOT com</a>> =
wrote:</div><br><blockquote type=3D"cite"><div dir=3D"ltr"><br><div =
class=3D"gmail_extra"><br><div class=3D"gmail_quote">On Tue, Aug 2, 2016 =
at 10:27 AM, John Doty <span dir=3D"ltr"><<a =
href=3D"mailto:jpd AT noqsi DOT com" =
target=3D"_blank">jpd AT noqsi DOT com</a>></span> wrote:<br><blockquote =
class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1px #ccc =
solid;padding-left:1ex"><div =
style=3D"word-wrap:break-word"><span><br><div><div>On Aug 2, 2016, at =
11:55 AM, Ouabache Designworks (<a href=3D"mailto:z3qmtr45 AT gmail DOT com" =
target=3D"_blank">z3qmtr45 AT gmail DOT com</a>) [via <a =
href=3D"mailto:geda-user AT delorie DOT com" =
target=3D"_blank">geda-user AT delorie DOT com</a>] <<a =
href=3D"mailto:geda-user AT delorie DOT com" =
target=3D"_blank">geda-user AT delorie DOT com</a>> =
wrote:</div><br><blockquote type=3D"cite"><span =
style=3D"font-family:Helvetica;font-size:12px;font-style:normal;font-varia=
nt:normal;font-weight:normal;letter-spacing:normal;line-height:normal;text=
-align:start;text-indent:0px;text-transform:none;white-space:normal;word-s=
pacing:0px;float:none;display:inline!important">This group has shown =
almost no interest in features that are needed by IC designers if they =
are not also needed by PCB designers.</span><br =
style=3D"font-family:Helvetica;font-size:12px;font-style:normal;font-varia=
nt:normal;font-weight:normal;letter-spacing:normal;line-height:normal;text=
-align:start;text-indent:0px;text-transform:none;white-space:normal;word-s=
pacing:0px"></blockquote><br></div></span><div>What do you imagine IC =
designers need? I design mixed-signal ASICs in gschem, and do not =
perceive any limits. Just another application for a complete, general =
purpose network topology editor.</div><br><div>
<span =
style=3D"border-collapse:separate;border-spacing:0px;font-family:Helvetica=
;font-size:12px;font-style:normal;font-variant:normal;font-weight:normal;l=
etter-spacing:normal;line-height:normal;text-indent:0px;text-transform:non=
e;white-space:normal;word-spacing:0px"><div style=3D"margin:0px"><font =
style=3D"font:12.0px Helvetica" face=3D"Helvetica" size=3D"3">John =
Doty<span> =
<span> </span><span> =
<span> </span></span></span>Noqsi Aerospace, =
Ltd.</font></div><div style=3D"margin:0px"><a =
href=3D"http://www.noqsi.com/" =
target=3D"_blank">http://www.noqsi.com/</a></div><div =
style=3D"margin:0px"><font style=3D"font:12.0px Helvetica" =
face=3D"Helvetica" size=3D"3"><a href=3D"mailto:jpd AT noqsi DOT com" =
target=3D"_blank">jpd AT noqsi DOT com</a></font></div><br></span>
</div>
<br></div></blockquote></div>How about libraries that you can download =
that don't have naming collisions with other =
libraries?<br></div></div></blockquote><div><br></div></span>Since you =
have complete control of your library path, why is this a problem? Just =
put together the library *your* project needs. No big deal. Certainly =
not something that requires a new *feature*.</div><div><span =
class=3D""><br></span></div></div></blockquote><div><br></div><div>So I =
need part A from Library foo and part B from library bar when both libs =
have both parts. How do I set up the search =
path?<br></div></div></div></div></blockquote><div><br></div>The way I =
do it is to have a project symbol directory. I copy the necessary =
symbols from libraries into there. It=92s safer to keep specialized =
symbols bundled with the project anyway. Libraries get =
revised.</div><div><br><blockquote type=3D"cite"><div dir=3D"ltr"><div =
class=3D"gmail_extra"><div =
class=3D"gmail_quote"><div><br> </div><blockquote =
class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1px #ccc =
solid;padding-left:1ex"><div style=3D"word-wrap:break-word"><span =
class=3D""><blockquote type=3D"cite"><div dir=3D"ltr"><div =
class=3D"gmail_extra"><br></div><div class=3D"gmail_extra">How about =
complete hierarchical design support with =
uniquification?<br></div></div></blockquote><div><br></div></span>I=92m =
not sure what your problem is. My ASICs are hierarchical (of =
course).</div></blockquote><div><br></div><div>When I descend down into =
a component instance then I want to see the schematic using all the =
elaborated values instead of the attribute =
names.<br></div></div></div></div></blockquote><div><br></div>Cute, but =
how much time would this actually save? (I hate cute, time-wasting =
=93features=94) In any case, you could probably do this with gschem =
scripting in Guile.</div><div><br><blockquote type=3D"cite"><div =
dir=3D"ltr"><div class=3D"gmail_extra"><div =
class=3D"gmail_quote"><div><br> </div><blockquote =
class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1px #ccc =
solid;padding-left:1ex"><div style=3D"word-wrap:break-word"><div><span =
class=3D""><br><blockquote type=3D"cite"><div dir=3D"ltr"><div =
class=3D"gmail_extra"><br></div><div class=3D"gmail_extra">How about =
Busses? IC's need support for wires,vectors and busses. Gschem does =
wires with some graphic support for vectors but nothing for =
busses.<br></div></div></blockquote><div><br></div></span>Need? Maybe =
they would be nice, but I haven=92t really missed them. Mostly you want =
them in complex digital parts, I think. If that was the kind of chip I =
was doing, I=92d do those straight in HDL, not draw them in gschem. In =
any case, there=92s nothing preventing you giving a net a name that =
describes a bus, and dealing with that downstream.</div><div><span =
class=3D""><br></span></div></div></blockquote><div><br><br></div><div>Wir=
es and vectors have inputs and outputs. Busses have masters and =
slaves. You need to support bundling wires,vectors and busses into =
bigger busses, passing it up and down hierarchies and then splitting =
everything back apart at the =
end.<br></div></div></div></div></blockquote><div><br></div>Analogues of =
some of that are in my experimental gnetlist back end for drawing =
Makefiles. It=92s just a matter of a little Guile scripting, =
really. <a =
href=3D"http://www.delorie.com/archives/browse.cgi?p=3Dgeda-user/2015/10/1=
2/13:53:03">http://www.delorie.com/archives/browse.cgi?p=3Dgeda-user/2015/=
10/12/13:53:03</a>. =93Net=94 lines don=92t need to know much about what =
they represent when they can learn from the pins connected to =
them.</div><div><br></div><div apple-content-edited=3D"true">
<span class=3D"Apple-style-span" style=3D"border-collapse: separate; =
border-spacing: 0px;"><p style=3D"margin: 0.0px 0.0px 0.0px 0.0px"><font =
face=3D"Helvetica" size=3D"3" style=3D"font: 12.0px Helvetica">John =
Doty<span class=3D"Apple-converted-space"> =
<span class=3D"Apple-converted-space"> </span><span =
class=3D"Apple-converted-tab"> <span =
class=3D"Apple-converted-space"> </span></span></span>Noqsi =
Aerospace, Ltd.</font></p><p style=3D"margin: 0.0px 0.0px 0.0px =
0.0px"><a href=3D"http://www.noqsi.com/">http://www.noqsi.com/</a></p><p =
style=3D"margin: 0.0px 0.0px 0.0px 0.0px"><font face=3D"Helvetica" =
size=3D"3" style=3D"font: 12.0px Helvetica"><a =
href=3D"mailto:jpd AT noqsi DOT com">jpd AT noqsi DOT com</a></font></p><br =
class=3D"Apple-interchange-newline"></span>
</div>
<br></body></html>=
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