www.delorie.com/archives/browse.cgi | search |
X-Authentication-Warning: | delorie.com: mail set sender to geda-user-bounces using -f |
X-Recipient: | geda-user AT delorie DOT com |
DKIM-Signature: | v=1; a=rsa-sha256; c=relaxed/relaxed; |
d=gmail.com; s=gamma; | |
h=mime-version:in-reply-to:references:date:message-id:subject:from:to | |
:content-type:content-transfer-encoding; | |
bh=dExAgcAJ17dYjFfV4z48txT3IXbbiYsm4PDqjMdTGjI=; | |
b=QzAPmhrn2ENYobcQ6OGo6nl3ObeeqkHrNZvl5yxi6108zv1CAUkJ+uPKBnQ9+Cv/O/ | |
IP0XTgUCIqA/fs8dHSmXBuAnTgTJAKa4QJEks7HoN/papy4d4OVTwtZtJzG02+5R6gD7 | |
3Og764KzS0fjTn4HD0i5h6XXbiiuJY27kVd4U= | |
MIME-Version: | 1.0 |
In-Reply-To: | <CAOtMX2jZvJQh9hFfsevKJyPimKtkSLgmQMHjHjrUhGyT9X-b3g@mail.gmail.com> |
References: | <20111117204524 DOT 10e586f5 AT rainbird> |
<4EC5CBEE DOT 5060904 AT optonline DOT net> | |
<20111117225359 DOT 2fcf159a AT rainbird> | |
<CAOtMX2jZvJQh9hFfsevKJyPimKtkSLgmQMHjHjrUhGyT9X-b3g AT mail DOT gmail DOT com> | |
Date: | Fri, 18 Nov 2011 09:16:39 -0500 |
Message-ID: | <CANtXPph-UN616B_-fpeN0Z13WnoYBV-43Ykaf1q3zrsZmDXhkA@mail.gmail.com> |
Subject: | Re: [geda-user] Modern GAL/PAL design with gEDA? |
From: | Charles Lepple <clepple AT gmail DOT com> |
To: | geda-user AT delorie DOT com |
X-MIME-Autoconverted: | from quoted-printable to 8bit by delorie.com id pAIEGiJk000666 |
Reply-To: | geda-user AT delorie DOT com |
Errors-To: | nobody AT delorie DOT com |
X-Mailing-List: | geda-user AT delorie DOT com |
X-Unsubscribes-To: | listserv AT delorie DOT com |
On Fri, Nov 18, 2011 at 12:47 AM, <asomers AT gmail DOT com> wrote: > Unlike FPGAs, a GAL22V10 requires no special secrets to program. An > FAE once showed me how to decode the JEDEC file using publicly > available information. So theoretically someone _could_ write an open > source compiler for it - but no one has. Steve Williams (author of Icarus Verilog) started to put together some tools for working with PAL chips: http://www.icarus.com/eda/ipal/ While I don't think the code currently does the logic reduction necessary to compile a new design, there are a number of description files which translate between the fuse bit numbers and the logical functions. For a 22V10, see pa/pal22v10.pa for functional descriptions of the macrocells, and some of the other files (with "dip" or "plcc" in the name) for mappings to pin numbers. -- - Charles Lepple
webmaster | delorie software privacy |
Copyright © 2019 by DJ Delorie | Updated Jul 2019 |