Mail Archives: pgcc/1998/03/12/17:24:13
On Thu, 12 Mar 1998, Marc Lehmann wrote:
>> What do you make of the following code. PGCC produces different
>> results when optimizing then when not optimization. I was
>> told it has to do with -fno-float-store, but pgcc doesn't appear
Same goes to standard GCC... I was disappointed to found that it didn't
regard -ffloat-store. (But don't trust my word; it was so a long time
ago that better to check it yourself.)
>the x86 chips are not really ieee compliant. that's not too serious, as I'll
This seems to be general misbelief (I've heard it before...).
The problem is not with Intel FPU. The problem is in C-compiler
(or maybe in OS... but not in FPU).
Usually, you want as much precision as possible. So usually it's just good
that there's some extra precision.
Is some cases, truly IEEE-compliant floating point system is needed. For
these cases there's a state bit in FPU that tells it to use less precision.
(Another good use for this bit is to speed up fdiv about 20 clocks; but
that's another story).
Generally code generated by the C compiler should use the higher precision.
But there really should be a switch to use IEEE-style lesser precision
floats (maybe (p)gcc has it, I don't know).
Even better would be #pragma or something which would allow one to use
IEEE-floats in some part of code and extra precision in another part.
>Any questions left? Don't hesitate - Ask!
This was not exactly a question, but I hope you don't mind ;)
--
| Tuukka Toivonen <tuukkat AT ee DOT oulu DOT fi> [PGP public key
| Homepage: http://www.ee.oulu.fi/~tuukkat/ available]
| Try also finger -l tuukkat AT ee DOT oulu DOT fi
| Studying information engineering at the University of Oulu
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