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Mail Archives: geda-user/2017/01/18/05:36:02

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Date: Wed, 18 Jan 2017 11:43:41 +0100 (CET)
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To: "Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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From: gedau AT igor2 DOT repo DOT hu
Subject: Re: [geda-user] [pcb] why no clearpoly on silk
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On Wed, 18 Jan 2017, Peter Clifton (petercjclifton AT googlemail DOT com) [via ged=
a-user AT delorie DOT com] wrote:

>I'm not sure it makes much sense to treat it differently, but historically
>it has been. It's not like your clearing a conductive plane object with
>conductive tracks - so I can sort of understand the distinction.
>I'm not sure that the element syntax allows any clearance data in the old
>pcb file format, so only stuff drawn directly on the design layer would be
>affected.
>
>When the clipper code was introduced it changed behaviours, such introduci=
ng
>the "full poly" flag, which when added mostly restored the old geometry
>you'd get from ancient pcb versions without the clipper.=C2=A0 This is all=
 long
>in the past, but at the time created problems where older designs opened
>with different connectivity in newer pcb.

Thanks. So we may have a reason around the auto-drawn silks from elements.=
=20
Good point, I'll take a look at that.

>Given the abundance of existing designs, you might cause silk layer breaka=
ge
>if you suddenly enable clipping there... unless we also special cased
>turning off the flags enabling clearance when drawing / moving new lines o=
n
>the silk layers?

Just to be clear on this, I do not propose any change for mainline for=20
this.

In pcb-rnd we have support for multiple board file formats. Our native=20
format is not pcb but lihata. We support pcb as we support kicad's format.=
=20
The native format supports all features, but the non-native ones don't.

So my removal of this restriction in pcb-rnd would do something like this:

- if silk polys are loaded from .pcb, I'd remove the clearpoly flag;=20
I think this would restore the original behaviour on load.

- when silk poly is saved to .pcb, maybe I should put there the clearpoly=
=20
flag, as that's how silk poly exists naturally - but I am not sure about=20
this part yet

- same rules apply to curret (then-old) version of the lihata format

- I'd bump the version of the lihata board format and the new version=20
wouldn't manipulate the silk poly flags on load or save


Do you think this could work?

Regards,

Igor2

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