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Mail Archives: geda-user/2015/12/29/14:10:04

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Date: Tue, 29 Dec 2015 14:09:50 -0500
Message-ID: <CAM2RGhRQcZfVQb0QdMLM-y2TUF23aUoMSJhJBbeH85-N1KbpfA@mail.gmail.com>
Subject: Re: [geda-user] Project leadership (design error in the core of gschem)
From: "Evan Foss (evanfoss AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: gEDA users mailing list <geda-user AT delorie DOT com>
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On Tue, Dec 29, 2015 at 12:29 PM, Ozzy Lash (ozzy DOT lash AT gmail DOT com) [via
geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
>
>
> On Tue, Dec 29, 2015 at 10:39 AM, Evan Foss (evanfoss AT gmail DOT com) [via
> geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
>>
>>
>>
>> slots:
>> The slotting mechanism is fundamentally worthless for a the majority
>> of cases were I would want to use it. Look at the 7400 symbols were
>> they have a whole extra symbol for the power pins. That is
>> conceptually IMHO something that should be a slot but you can't do
>> that because all symbols have to have the same number of pins and
>> geometry.
>>
>> In places were slotting could be cool we don't use it right in the
>> standard symbol library. Take the symbols for the larger xilinx chips.
>> I would rather each section of the chips I/O be it's own slot so I can
>> show the FPGA connections near what they are connected too instead of
>> putting the FPGA on it's own page (most of the time). Likewise
>> breaking it up into more symbols would mean not wasting most of a page
>> on the empty area inside the FPGA symbol.
>>
>>
>
> I'm having a little trouble understanding what your definition of "slots"
> is.  I think the current gschem concept of a slot is what I am used to, i.e.
> a slot is an interchangeable element of a chip.  So a 7400 has 4 nand slots,
> and they are identical.  As far as I am concerned, slots are only a tool for
> back annotation.  During schematic capture, you can assign the gates from a
> chip in any order, then when laying out the PCB, you can choose which slot
> routes the best, and swap them around, and then back annotate.

Back annotation was on of the perspective uses for it but...
1. Our only currently existing back annotation implementation (which
isn't really geda's) is Igor2's pcb-rnd and fork of gschem. It does
not use slots.
2. Slot information for a given refdes is not provided to the PCB
suite so it has no idea what slots are available. (good idea though)
3. There are a lot of chips like FPGA and etc that have functionally
equivalent pins but are not really amenable to slotting in the same
visually descriptive manner.
4. To me slotting is mostly only good for grouping the symbols that go
with a given refdes.

> Bill



-- 
Home
http://evanfoss.googlepages.com/
Work
http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/

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