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Mail Archives: geda-user/2015/12/26/16:22:20

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Date: Sat, 26 Dec 2015 15:22:04 -0600
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Subject: [geda-user] Re: Delivery Status Notification (Failure)
From: "Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: gEDA User Mailing List <geda-user AT delorie DOT com>
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Focus on within-layer clearances for now.

Any more complex design rules (such as dielectric breakdown through
the layer stack) requires more data than we have in PCB's data-model,
and may actually belong in a separate calculation utility that would
calculate out a geometric design rule that can be applied in PCB.


Peter

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> Subject: Re: [geda-user] using DRC for other clearance values -- probably a
>  bad idea
> From: Peter Clifton <Peter DOT Clifton AT clifton-electronics DOT co DOT uk>
> To: gEDA User Mailing List <geda-user AT delorie DOT com>
> Content-Type: text/plain; charset=UTF-8
>
> Focus on within-layer clearances for now.
>
> Any more complex design rules (such as dielectric breakdown through
> the layer stack) requires more data than we have in PCB's data-model,
> and may actually belong in a separate calculation utility that would
> calculate out a geometric design rule that can be applied in PCB.
>
>
> Peter
>
> On 26 December 2015 at 14:47, Nicklas Karlsson
> (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]
> <geda-user AT delorie DOT com> wrote:
>>> I previously said existing DRC could be used for this.  Unfortunately I
>>> guess that for cases where larger clearances are desired, it's often
>>> because of electromagnetic considerations, which means that it's probably
>>> really an inter-layer requirement, which means existing DRC code would not
>>> be useful.  Sorry.
>>>
>>> Britton
>>
>> Are they allowed to come close to each other on different layers? Or not?
>>
>>
>> Nicklas Karlsson

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