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Date: | Sun, 13 Sep 2015 14:35:07 -0800 |
Message-ID: | <CAC4O8c_BqyU1T09i-rC6Ho49XPgDs8-SGaoqnqREiqG+wdTd_Q@mail.gmail.com> |
Subject: | Re: [geda-user] RFC: pin attribute remapping |
From: | "Britton Kerin (britton DOT kerin AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
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--f46d0438932b968476051fa88f47 Content-Type: text/plain; charset=UTF-8 On Sun, Sep 13, 2015 at 2:09 PM, DJ Delorie <dj AT delorie DOT com> wrote: > > > > Aside from assigning GUIDs to each symbol as they're instantiated, I > > [snip discussion about slots that I didn't understand, because I've always been too scared to try slots after hearing the discussions] > However, I'm guessing heirarchical layout could be arbitrarily complex > in itself. It would be nice to only have to layout each subsection once and have that repeat, but that assumes each section can be laid > out exactly the same. The ASIC folks seem to have this down pat but > Are you set up with scripts to handle the basic case of one level of hierarchy? I have scripts that do this pretty well. Of course you can manually edit individual instances once they're on the board. Some of the scripts I have in mind that make my want a more scriptable pcb involve automatically remapping subcircuit layers so a pre-existing layout can more easily be stuffed into other designs. --f46d0438932b968476051fa88f47 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable <div dir=3D"ltr"><br><div class=3D"gmail_extra"><br><div class=3D"gmail_quo= te">On Sun, Sep 13, 2015 at 2:09 PM, DJ Delorie <span dir=3D"ltr"><<a hr= ef=3D"mailto:dj AT delorie DOT com" target=3D"_blank">dj AT delorie DOT com</a>></span= > wrote:<br><blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;bo= rder-left:1px #ccc solid;padding-left:1ex"><span class=3D""><br> > > Aside from assigning GUIDs to each symbol as they're instanti= ated, I<br></span><br></blockquote><div><br></div><div style=3D"">[snip dis= cussion about slots that I didn't understand, because I've always b= een</div><div style=3D"">too scared to try slots after hearing the discussi= ons]</div><div>=C2=A0</div><blockquote class=3D"gmail_quote" style=3D"margi= n:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> However, I'm guessing heirarchical layout could be arbitrarily complex<= br> in itself.=C2=A0 It would be nice to only have to layout each subsection</b= lockquote><blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;bord= er-left:1px #ccc solid;padding-left:1ex"> once and have that repeat, but that assumes each section can be laid<br> out exactly the same.=C2=A0 The ASIC folks seem to have this down pat but<b= r></blockquote><div><br></div><div style=3D"">Are you set up with scripts t= o handle the basic case of one level of hierarchy?=C2=A0 I have scripts tha= t do this pretty well.=C2=A0 Of course you can manually edit individual ins= tances once they're on the board.=C2=A0 Some of the scripts I have in m= ind that make my want a more scriptable pcb involve automatically remapping= subcircuit layers so a pre-existing layout can more easily be stuffed into= other designs.</div><div><br></div></div></div></div> --f46d0438932b968476051fa88f47--
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