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Message-ID: | <55EEA0B4.6050003@iae.nl> |
Date: | Tue, 08 Sep 2015 10:47:48 +0200 |
From: | myken <myken AT iae DOT nl> |
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To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] Anybody using gschem for VHDL structural design? |
References: | <CAGde_xM9UTyGyewcYCK5OnczRGAMvu=EkkkK=ARi7PK5OsUB5A AT mail DOT gmail DOT com> |
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Reply-To: | geda-user AT delorie DOT com |
On 08/09/15 09:27, Svenn Are Bjerkem (svenn DOT bjerkem AT googlemail DOT com) [via geda-user AT delorie DOT com] wrote: > Hi, > I wonder if anybody on this list uses gschem to maintain structural > designs in VHDL. > > I am particularly looking for ways to extract entity definitions to > make symbols on the fly for toplevel design for use in testbenches. > > There are scripts on the 'Net which I can adopt to my need, but if > somebody already has a working design flow and would like to share, I > would like to join in on maintenance/development. > > > -- > Svenn I use gschem for VHDL design. However I make my symbols the hard-way just to have an extra check. I do have a link in my archives on test bench creation script, never used it so can't tell you how good they are. http://web.ece.ucdavis.edu/~jwwebb/ee/howto/using_perl_with_vhdl.html Cheers, Robert.
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