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References: | <alpine DOT DEB DOT 2 DOT 11 DOT 1509031356150 DOT 13201 AT nimbus> |
Date: | Fri, 4 Sep 2015 02:05:57 +0000 |
Message-ID: | <CAM2RGhQD1cbbKZ=OTULMds1TGH1S3oj07W3Z29SJoAyKGm0meQ@mail.gmail.com> |
Subject: | Re: [geda-user] New experimental netlist features |
From: | "Evan Foss (evanfoss AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
To: | geda-user AT delorie DOT com |
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Is this built using libgeda or is the whole thing in python? On Thu, Sep 3, 2015 at 1:32 PM, Roland Lutz <rlutz AT hedmen DOT org> wrote: > Hi, > > I added a few experimental features to the netlister, including buses and > variable substitution. The latest revision contains an example schematic > "tests/netlist/mod_7seg.sch" which demonstrates these features. > > You can clone the repository from > > git://github.com/rlutz/xorn.git (branch "experimental") > > or download a convenience tarball from: > > http://hedmen.org/xorn/xorn-netlist-experimental.tar.gz > > In detail, the new features are: > > - Components with a single pin can now have a "netname=" attribute which > acts like a "net=" attribute on that pin. This allows using the "netname=" > attribute as a clean label on customizable power symbols. > > - Analogously, I/O ports in subschematics can now be indicated using the > "portname=" attribute instead of "refdes=". If there are I/O ports for > which there is no matching pin in the instantiating symbol, an error is > reported. > > - Components can now have bus pins. This is currently only available by > hacking the file (i.e., changing the next-to-last number in the pin line > from "0" to "1"). The "pinnumber=" attribute on a pin and the "netname=" > attribute on a bus are interpreted as a comma-separated list of pin ranges. > Pin ranges can be denoted by either ".." or ":"; when using the latter > notation, the last pin isn't included in the list. Optionally, the pin > range can be given in brackets and have a common prefix. > > Examples: "4..7,14..11" -> 4 5 6 7 14 13 12 11 > "D[8:0]" -> D7 D6 D5 D4 D3 D2 D1 D0 > > Bus rippers still work the way they did before (i.e., not at all unless you > set the appropriate attributes by hand). > > - Subschematics can now have I/O busses. I/O bus pins work analogously to > normal bus pins but have a "pinlabel=" attribute instead of a "pinnumber=" > attribute. Inside the subschematic, you can either use a matching I/O port > symbol with a bus pin or individual net port symbols. Bus I/O ports > currently only support the new "portname=" syntax. > > - A subsheet symbol can have one ore more "subst=NAME=VALUE" attributes. > Inside the subschematic, any occurrence of "$(NAME)" is replaced with > "VALUE". This only works for attribute retrieval from packages; in > particular, it isn't possible to change slotting or subsheet source files > this way. > > Roland > -- Home http://evanfoss.googlepages.com/ Work http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/
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