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Date:	Tue, 1 Sep 2015 11:59:10 -0700
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Subject:	Re: [geda-user] back annotation proposal (RFC)
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I would like to talk about a process that I call "Uplift" and how it works
with backannotation.

We enter designs all the time where we do not have all of the information
at the time so we enter what we know
or make a guess and return later to either add or change it. Essentially
any designer can "Uplift" information
that any previous designer has entered. The original designer provides a
bare minumum of information and subsequent
designers are allowed to tighten those requirements, They are NOT allowed
to loosen them.

For example the original designer will put in a resistor with value,
tolerence and power ratings. The board designer
selecting the part has to adhere to the value but can tighten the tolerence
and raise the power rating since their
tightened spec will still meet the original requirements.


Backannotation is a form of uplifting since you are adding back information
that was not available at the original
data entry.

Now let's look at DJ's proposal.



  I think a light symbol should have symbolic pin names, like E,B,C for
transistors, or A,B,Y for NAND gates.
  For most box-type symbols (MCUs, memories, etc) the pin label can be used
as the name - pins just won't have pin numbers at first.

  The component database provides a symbolic pin to physical pin mapping,
along with pin grouping information.



We start with a light symbol for a single resister. Two pins named  "1" and
"2" and some simple graphics that I instantiate
in a schematic. Before I can send this schematic to pcb layout I must first
"Package" it. This step will get the symbolic pin to physical pin mapping
from the  component database and attach it to the instance.


The problem is that there are hundreds or even thousands of different
resistors in my  database. I could choose a thru-hole part for packaging
only to
have the pcb layout engineer change it to surface mount part or  inline sip
or dip array. Those changes would have to be backannotated from PC layout
to the original schematic.

So here's the problem. You frequently have to take one design into multiple
PCB's. Your schematic will be used in the real product so it must be nice
and compact with all surface mount parts. You will also use the same
schematic to build a "break-out-board" with thru-hole parts for testing and
code
development.

In this case if you backannotate then you wind up with two different
schematics. You want to maintain a single master schematic so that any
changes can
be entered in one edit.Never copy data in a data base. If you have to enter
changes in mulitiple files then someone is likely to screw it up.

The best way to do this is by forward annotating the changes by taking the
original schematic, back annotating the changes for one board and then
saving it
under a new name for use with its particular PCA. The master schematic is
never altered.

You copy the master as part of the packaging process so we don't have to
deal with the master changing and we never try to push data upstream.


John Eaton

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<div dir=3D"ltr"><br><div class=3D"gmail_extra">I would like to talk about =
a process that I call &quot;Uplift&quot; and how it works with backannotati=
on.<br><br>We enter designs all the time where we do not have all of the in=
formation at the time so we enter what we know<br>or make a guess and retur=
n later to either add or change it. Essentially any designer can &quot;Upli=
ft&quot; information<br>that any previous designer has entered. The origina=
l designer provides a bare minumum of information and subsequent<br>designe=
rs are allowed to tighten those requirements, They are NOT allowed to loose=
n them.<br><br>For example the original designer will put in a resistor wit=
h value, tolerence and power ratings. The board designer<br>selecting the p=
art has to adhere to the value but can tighten the tolerence and raise the =
power rating since their<br>tightened spec will still meet the original req=
uirements.<br><br><br>Backannotation is a form of uplifting since you are a=
dding back information that was not available at the original<br>data entry=
.<br><br>Now let&#39;s look at DJ&#39;s proposal.<br><br><br><br>=C2=A0 I t=
hink a light symbol should have symbolic pin names, like E,B,C for transist=
ors, or A,B,Y for NAND gates.<br>=C2=A0 For most box-type symbols (MCUs, me=
mories, etc) the pin label can be used as the name - pins just won&#39;t ha=
ve pin numbers at first.<br><br>=C2=A0 The component database provides a sy=
mbolic pin to physical pin mapping, along with pin grouping information.<br=
><br><br><br>We start with a light symbol for a single resister. Two pins n=
amed=C2=A0 &quot;1&quot; and &quot;2&quot; and some simple graphics that I =
instantiate<br>in a schematic. Before I can send this schematic to pcb layo=
ut I must first &quot;Package&quot; it. This step will get the symbolic pin=
 to physical pin mapping<br>from the=C2=A0 component database and attach it=
 to the instance.<br><br><br>The problem is that there are hundreds or even=
 thousands of different resistors in my=C2=A0 database. I could choose a th=
ru-hole part for packaging only to<br>have the pcb layout engineer change i=
t to surface mount part or=C2=A0 inline sip or dip array. Those changes wou=
ld have to be backannotated from PC layout<br>to the original schematic.<br=
><br>So here&#39;s the problem. You frequently have to take one design into=
 multiple PCB&#39;s. Your schematic will be used in the real product so it =
must be nice<br>and compact with all surface mount parts. You will also use=
 the same schematic to build a &quot;break-out-board&quot; with thru-hole p=
arts for testing and code<br>development.<br><br>In this case if you backan=
notate then you wind up with two different schematics. You want to maintain=
 a single master schematic so that any changes can<br>be entered in one edi=
t.Never copy data in a data base. If you have to enter changes in mulitiple=
 files then someone is likely to screw it up.<br><br>The best way to do thi=
s is by forward annotating the changes by taking the original schematic, ba=
ck annotating the changes for one board and then saving it <br>under a new =
name for use with its particular PCA. The master schematic is never altered=
.<br><br></div><div class=3D"gmail_extra">You copy the master as part of th=
e packaging process so we don&#39;t have to deal with the master changing a=
nd we never try to push data upstream.<br></div><div class=3D"gmail_extra">=
<br><br>John Eaton<br><br><br><br><br><br><br></div></div>

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