Mail Archives: geda-user/2014/07/23/16:35:49
On 07/23/2014 01:46 PM, Evan Foss wrote:
> I should think the subcircuit really just
> needs some special tag on it's page that will indicate the Rx, Cx and
> other reference designators will be altered after netlisting &
> tessellation on the layout.
In chips or big circuits with repeated elements the burden would be huge.
Flat netlisting would grind to a halt for circuits with 40 elements repeated 64 times
in one area, and 50 other cases of the same in the whole circuit. That example
is 128K circuit elements used to make shift registers, and not even estimating RAM
and ROM to use.
But printed electronics that goes on the door of a washing machine could get that way easily.
There would be plenty of ROM to encode your programs, and some RAM to run out of,
all made in a slow large CMOS type of organic or nano inorganic semiconductor set of materials
printed on the surface of the door panel so it can dissipate heat and have low low leakage
and low low power consumption, and slow boring performance to go with that. But fine for
motor control and a UI, and there would be a few chips added to transition to the faster networking
circuit world around that slow washing machine bot. The circuit area would look like
all wires and flat patches of capacitance and transistors with no 3D components anywhere except a few
at the edge with an ethernet cable or wireless going out, or at the edge with the motor control
where there are a few special power transistors attached..
Think about making a 64 bit ALU...it would get super tedious to have unique ref des's for
all those transistors. You really just need to know they come from "such and such"
module that has been simulated plenty and can be used with up to so much length of wires away.
Each placement of a module does not need its own unique identifier for module's R1, R2, C1.
They can all be called R1, R2, C1, and exist in different instances of the identical
module, where the instances are kept track of in the netlist and by gschem.
There would be no components needing a ref des anyway in an array repetitive circuit case, since
the circuit elements would be completed from primitives like in chip
mask making, not by an assembly step needing a ref des.
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