Mail Archives: geda-user/2014/07/07/02:42:43
On Sun, Jul 06, 2014 at 01:16:31AM -0400, DJ Delorie wrote:
>
> > The peninsulas neck down to less than the minimum copper width rule.
>
> I typically expand the pad clearances until such necks vanish.
I did this until holes were added to polygons. Now I use holes to
precisley control where the copper pour stops. But holes have
they own problems (moving them, mostly, they are rigidly linked
to the containing polygon), so I only draw them as the last step,
when everything else is essentially ready for production.
>
> > So, first off, I'm surprised that the Cu polygon allows Cu to pour into
> > a space less than the minimum width rule.
>
> Polygon pours are handled poorly in pcb.
That's an understatement. While it had other defects (and many), I really
liked how Orcad/PCB 386 worked in the mid 90s:
- polygon had a class (filled, no fill, and others for other purposes
I can't remember since I never used them)
- polygons had a Z order (an integer) to define the ordering in which they were
painted (so if you put a high order fill inside a middle order no-fill inside
a low order fill, you get what you expect).
- polygons had "seed points" to provide starting points for fills (no largest
area rule) and could have several of them (no need for an equivalent of
the MorphPolygon command, which has its own problems).
Note that the largest area rule is ambiguous on at least one of the boards
I designed a few years ago: I had a very symmetrical polygon for some
coplanar waveguide structure. When PCB was "upgraded" to the new polygon
dicer it arbitrarily chose one of the halves, but the symmetrical one
was absolutely identical. Actually I kept in old version of PCB for
some time because it caused me too many troubles.
There is anothe bug in PCB's polygon pours, I think that pours should
go through lines that don't have the "clearline" flag set. As far as I
can say, they don't.
>
> > Secondly, I'm wondering if fab houses might flag that as a DRC violation
> > even if pcb doesn't.
>
> Some might. I've had one break loose and cause a short in a
> manufactured board before, so I'm particularly wary of them.
>
> > Third, is it legal to specify zero-width Pad[] elements in a footprint,
> > and assign clearance values, in order to composite some clearance into
> > the footprint?
>
> I think this is fine, although perhaps a tiny non-zero width might be
> needed. I don't know if these cause outputs in the gerber file,
> though, so be careful.
I really recommend using polygon holes in this case, I did this before
holes were supported, and this was much worse, despite the defects
of the holes listed above.
Gabriel
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