Mail Archives: geda-user/2013/10/27/15:47:33
On Sun, 2013-10-27 at 23:50 +0430, James Jackson wrote:
> IMO, not explicitly calling out the power connections is a
> mistake, just
> like using symbol embedded (hidden) power-nets on components
> is.
>
>
> Ah, I do explicitly call them out, but in a separate location from the
> functional use of the part. This means my design isn't cluttered with
> power rail decoupling stuff, however there is a sheet that is full of
> only that kind of stuff.
That is a fine way of doing things, and one I use myself. What I
referred to previously was Leaving the GND and VCC connections to be
made by "net=GND:7" "net=VCC:14" attributes hidden inside a symbol. That
method is asking for trouble in modern designs with multiple power
rails.
[snip]
>
> I've done this with symbols rather than subcircuits - for example, two
> symbols for an op amp, one with only the functional pins, and one with
> only the power pins. The former exists on a 'process' schematic, the
> latter on my power schematic.
Again, absolutely fine, I was just thinking out loud how it might (or
might not) work for symbols which instantiate parts of the hierarchy.
gschem + gnetlist are pretty dumb tools, and you could "probably" split
different parts of a sub-circuit into multiple pages, then instantiate
them with different symbols - assuming you gave both the same refdes.
I vaguely recall it was me who added support for leaving the refdes=
attribute missing to allow "hierarchy" without the name prefix.
Regards,
--
Peter Clifton <peter DOT clifton AT clifton-electronics DOT co DOT uk>
Clifton Electronics
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