www.delorie.com/archives/browse.cgi | search |
X-Authentication-Warning: | delorie.com: mail set sender to geda-user-bounces using -f |
X-Recipient: | geda-user AT delorie DOT com |
DKIM-Signature: | v=1; a=rsa-sha256; c=relaxed/relaxed; |
d=gmail.com; s=gamma; | |
h=mime-version:sender:in-reply-to:references:date | |
:x-google-sender-auth:message-id:subject:from:to:content-type | |
:content-transfer-encoding; | |
bh=MrnOvnLxLPKzTve6S2PLrrcn5r1r92KrKpykXSOwDAM=; | |
b=rL07VVrakQLzbHIDZRAT8LqjDXL1tXX+GXeNamAxHBmbty+TIGQ/0PHrEhYpKAlbO7 | |
BX+IKIjvX3908n5UaFLYUaXepFtPfeROG33L4JwXsHp3To6hpuoNQAj9EUE8uvEI9NnR | |
e4OxyKT+10Mn0iXVeEnYhHu82ALp2jy6hpQcg= | |
MIME-Version: | 1.0 |
Sender: | silicon DOT on DOT inspiration AT gmail DOT com |
In-Reply-To: | <CAN0Jx-_9xc9-Zx6u_JYqagGEx1z2n=+QLWsRxPngqKCyjZsCuQ@mail.gmail.com> |
References: | <1320692655 DOT 6963 DOT 20 DOT camel AT localhost> |
<CAKakQccfDYfPqi9qY0mxjgtoFC9x3WweOJBpd3rhzGuQ1C5P1Q AT mail DOT gmail DOT com> | |
<CAN0Jx-8WVgStP=DPZBAZoZEv4+qqCV-+KwaS5Xo3EY+3URBrLw AT mail DOT gmail DOT com> | |
<CAKakQcccLN-YjbvSsjw5xXOKLh_GBSC52K1AHjMg48rLvzZWwQ AT mail DOT gmail DOT com> | |
<CAN0Jx-_9xc9-Zx6u_JYqagGEx1z2n=+QLWsRxPngqKCyjZsCuQ AT mail DOT gmail DOT com> | |
Date: | Tue, 8 Nov 2011 09:08:13 +1100 |
X-Google-Sender-Auth: | 2U1q2ygDGqs8yATPOutTl4Nasu4 |
Message-ID: | <CAKakQccABN7uuLjii_n+g+Cm2Uc=pvzh3-rys-f4jc3DYd0jQA@mail.gmail.com> |
Subject: | Re: [geda-user] PCIe card? |
From: | Stephen Ecob <stephen DOT ecob AT sioi DOT com DOT au> |
To: | geda-user AT delorie DOT com |
X-MIME-Autoconverted: | from quoted-printable to 8bit by delorie.com id pA7M8IrF011152 |
Reply-To: | geda-user AT delorie DOT com |
Errors-To: | nobody AT delorie DOT com |
X-Mailing-List: | geda-user AT delorie DOT com |
X-Unsubscribes-To: | listserv AT delorie DOT com |
Hi Russell, On Tue, Nov 8, 2011 at 8:32 AM, Russell Dill <Russ DOT Dill AT asu DOT edu> wrote: > On Mon, Nov 7, 2011 at 2:23 PM, Stephen Ecob <stephen DOT ecob AT sioi DOT com DOT au> wrote: >> On Tue, Nov 8, 2011 at 8:04 AM, Russell Dill <Russ DOT Dill AT asu DOT edu> wrote: >>>> One idea I had for a quick start was to lay out and edit a PCB with >>>> the differential pairs replaced by fat single traces of thickness (2 * >>>> differential trace copper thickness + differential trace internal >>>> spacing). A fairly simple bit of code could later convert these from >>>> fat single traces to differential pairs. >>> >>> BTW, it isn't really necessary to route differential traces this way. >>> Rather than route them with a very tightly regulated spacing, you can >>> route them instead with a minimum spacing as single ended traces, >>> which is much easier. Just be sure they have equal lengths impedances. >> >> That's how I presently use PCB to implement differential pairs. It >> works well enough for the ~ 1Gbps signals that I'm working with, but I >> wouldn't try it for something like 5Gbps PCIE. >> The main limitation is that the spacing between the traces changes >> slightly for diagonal lines, changing the impedance. > > As long as you have them far enough apart, it doesn't matter if the > spacing changes. > >> For high speeds I'd also want to eliminate sharp corners and use arcs >> for every change in direction. Creating pairs of arcs that maintain >> even spacing would be tedious using PCB's present UI. Creating single >> thick arcs in the GUI and later having them transformed into correctly >> spaced pairs of arcs would be bearable. > > I don't think that'd have an effect even at 5Gpbs. You'd probably even > be ok with right angle corners, unless your margins are really really > tight already. That sounds rather optimistic to me :-) See p12 of: http://www.pcisig.com/developers/main/training_materials/get_document?doc_id=6d37ec2f8543fc1f9d8ace6264d08b469f57e5f1 (tiny URL in case the above gets broken in transit:) http://tiny.cc/r4q64 Best regards, Stephen -- Stephen Ecob Silicon On Inspiration Sydney Australia www.sioi.com.au
webmaster | delorie software privacy |
Copyright © 2019 by DJ Delorie | Updated Jul 2019 |