Mail Archives: djgpp/2000/04/09/17:29:53
Nate Eldredge wrote:
>buers AT gmx DOT de (Dieter Buerssner) writes:
>
>> You might want to mention "q" for one of eax/ebx/ecx/edx as well.
>
>Actually, "q" means one of al/ah/bl/bh/cl/ch/dl/dh, though this is not
>explained well in the docs. The "q" stands for "quarter-word", i.e. 8
>bits.
Then the gcc manual seems wrong to me. Under Constraints for Particular
Machines I read:
|*Intel 386--`i386.h'*
|
| `q'
| `a', `b', `c', or `d' register
Also, this would make sense to me. You could write code,
that uses any appropriate register, that can be split in high
and low bytes, much like the "r" constraint. I.e. in asm pseudo
code
__asm__ (
/* Do something with the 32 bit register */
"opcodel %0, ...\n"
/* %0 not needed anymore, use for something else*/
"movb (bytepointer), %b0\n"
"movb (bytepointer2), %h0\n"
: "=q" (unsused) /* because we clobbered it */
: "0" (some32bitval), /* and more */
);
This would give gcc more freedom in the register allocation, and
could therefore produce better code than using "=a" instead of "=q".
>And AFAIK the register constraints you list always use the 32 bit
>form, ie "a" is always %eax and never %ax. If you want %ax you have
>to use an (AFAICT) undocumented feature that changes the "mode" of the
>operand. So if you have an operand 1 with the "a" constraint:
>
>"%w0" is %ax
>"%b0" is %al
>"%k0" is %eax
>"%h0" is %ah
You guessed correctly, why I thought "q" would be useful. This information
would be needed as well.
>See line 2400 of config/i386.h in the gcc source.
I don't have the gcc source (anymore).
>Yes, I agree this should be in the manual. Feel like sending a patch?
I think, that people more familiar with the gcc innards and/or
native English speakers could prepare better patches. I prefer to
patch source code.
--
Regards, Dieter
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