www.delorie.com/archives/browse.cgi   search  
Mail Archives: djgpp/2000/03/15/19:18:04

Message-ID: <38CFF244.A29DDEDB@radar.mcgill.ca>
From: Frederic Cazenave <cazenave AT radar DOT mcgill DOT ca>
Organization: IRD (ex ORSTOM)
X-Mailer: Mozilla 4.08 [en] (X11; I; IRIX64 6.1 IP26)
MIME-Version: 1.0
Newsgroups: comp.os.msdos.djgpp
Subject: interrupt priority
Lines: 139
Date: Wed, 15 Mar 2000 20:27:05 GMT
NNTP-Posting-Host: 132.206.246.96
X-Complaints-To: abuse AT mcgill DOT ca
X-Trace: carnaval.risq.qc.ca 953152025 132.206.246.96 (Wed, 15 Mar 2000 15:27:05 EST)
NNTP-Posting-Date: Wed, 15 Mar 2000 15:27:05 EST
To: djgpp AT delorie DOT com
DJ-Gateway: from newsgroup comp.os.msdos.djgpp
Reply-To: djgpp AT delorie DOT com

--------------EA1AAB3F9AA6F964B6B1AB7B
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

Hi,

I have made a program with 2 interrupts actives sources, One is coming
from a ADC ISA board on IRQ5 et the second one is coming from a DSP
pci board on a interrupt on the second PIC (IRQ 13 in think).
The ADC interrupt appears 6 time more often than the DSP one.
At a frequency up to 300 hz for the ADC interrupt, it seems that a ADC
interrupt occurs during the execution of the DSP interrupt routine but
, I lose it cause of this lower priority. The code of the DSP interrupt
is
quite long. So I need to set  the priority of the ADC interrupt higher
than
the DSP one.

I have try to do than in two different  ways :

// in my main program
  outp(0x20,0xC2); // set IRQ2 to the lowest priority

and

// at the beginning  of the DSP interrupt routine
   outp(0x20,68);                         // Set special mask mode
   outp(0x21,inp(0x21) | 0x02);  // disable irq 2 on PIC 2
    .
    .
    .
    .
// and this at the end
   outp(0x20,0x48);                            // clear special mask
mode
   outp(0x21,inp(0x21) & ~(0x02));  // restore the original mask
   if(Intnum > 7) {
      outp(0xA0, 0x60 + (Intnum - 8 ));     /* reset PIC1 */ /* do this
first */
      outp(0x20, 0xE2);
   }
   else
      outp(0x20,0x60+Intnum);                /* reset PIC0 */


Unfortunately, I lose always one of the ADC int.

I use to _go32_dpmi_set_protected_mode_interrupt_vector to set
my interrupt routines.

Thanks in advance for your help

Fred Cazenave

--
 _________________________________________________________
|                                                          |
|               Frederic CAZENAVE                          |
|    _/\_  /^=  McGill Radar                               |
| \_/    \//    Box 198, MacDonald College                 |
|   | /-\ |     Ste Anne de Bellevue                       |
|   ||   ||     Quebec, Canada   H9X 3V9                   |
|               Tel (514) 398 7733 fax (514) 398 7755      |
|               mailto:Frederic DOT Cazenave AT hmg DOT inpg DOT fr       |
|               http://www.mpl.orstom.fr/hydrologie/catch/ |
|__________________________________________________________|



--------------EA1AAB3F9AA6F964B6B1AB7B
Content-Type: text/html; charset=us-ascii
Content-Transfer-Encoding: 7bit

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML>
Hi,
<P>I have made a program with 2 interrupts actives sources, One is coming
<BR>from a ADC ISA&nbsp;board on IRQ5 et the second one is coming from
a DSP
<BR>pci board on a interrupt on the second PIC (IRQ 13 in think).
<BR>The ADC interrupt appears 6 time more often than the DSP&nbsp;one.
<BR>At a frequency up to 300 hz for the ADC interrupt, it seems that a
ADC
<BR>interrupt occurs during the execution of the DSP interrupt routine
but
<BR>, I lose it cause of this lower priority. The code of the DSP interrupt
is
<BR>quite long. So I need to set&nbsp; the priority of the ADC interrupt
higher than
<BR>the DSP one.
<P>I have try to do than in two different&nbsp; ways :
<P>// in my main program
<BR>&nbsp; outp(0x20,0xC2); // set IRQ2 to the lowest priority
<P>and
<P>// at the beginning&nbsp; of the DSP&nbsp;interrupt routine
<BR>&nbsp;&nbsp; outp(0x20,68);&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
// Set special mask mode
<BR>&nbsp;&nbsp; outp(0x21,inp(0x21) | 0x02);&nbsp; // disable irq 2 on
PIC&nbsp;2
<BR>&nbsp;&nbsp;&nbsp; .
<BR>&nbsp;&nbsp;&nbsp; .
<BR>&nbsp;&nbsp;&nbsp; .
<BR>&nbsp;&nbsp;&nbsp; .
<BR>// and this at the end
<BR>&nbsp;&nbsp; outp(0x20,0x48);&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
// clear special mask mode
<BR>&nbsp;&nbsp; outp(0x21,inp(0x21) &amp; ~(0x02));&nbsp; // restore the
original mask
<BR>&nbsp;&nbsp; if(Intnum > 7) {
<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; outp(0xA0, 0x60 + (Intnum - 8 ));&nbsp;&nbsp;&nbsp;&nbsp;
/* reset PIC1 */ /* do this first */
<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; outp(0x20, 0xE2);
<BR>&nbsp;&nbsp; }
<BR>&nbsp;&nbsp; else
<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; outp(0x20,0x60+Intnum);&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
/* reset PIC0 */
<BR>&nbsp;
<P>Unfortunately, I lose always one of the ADC int.
<P>I use to _go32_dpmi_set_protected_mode_interrupt_vector to set
<BR>my interrupt routines.
<P>Thanks in advance for your help
<P>Fred Cazenave
<PRE>--&nbsp;
&nbsp;_________________________________________________________
|&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |
|&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Frederic CAZENAVE&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |
|&nbsp;&nbsp;&nbsp; _/\_&nbsp; /^=&nbsp; McGill Radar&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |
| \_/&nbsp;&nbsp;&nbsp; \//&nbsp;&nbsp;&nbsp; Box 198, MacDonald College&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |
|&nbsp;&nbsp; | /-\ |&nbsp;&nbsp;&nbsp;&nbsp; Ste Anne de Bellevue&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |
|&nbsp;&nbsp; ||&nbsp;&nbsp; ||&nbsp;&nbsp;&nbsp;&nbsp; Quebec, Canada&nbsp;&nbsp; H9X 3V9&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |
|&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Tel (514) 398 7733 fax (514) 398 7755&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |
|&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <A HREF="mailto:Frederic DOT Cazenave AT hmg DOT inpg DOT fr">mailto:Frederic DOT Cazenave AT hmg DOT inpg DOT fr</A>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |
|&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <A HREF="http://www.mpl.orstom.fr/hydrologie/catch/">http://www.mpl.orstom.fr/hydrologie/catch/</A> |
|__________________________________________________________|</PRE>
&nbsp;</HTML>

--------------EA1AAB3F9AA6F964B6B1AB7B--

- Raw text -


  webmaster     delorie software   privacy  
  Copyright © 2019   by DJ Delorie     Updated Jul 2019