Date:	Wed, 11 Feb 1998 18:40:57 -0800 (PST)
Message-Id:	<199802120240.SAA17186@adit.ap.net>
Mime-Version:	1.0
To:	<flemming DOT larsen AT private DOT dk>, djgpp AT delorie DOT com
From:	Nate Eldredge <eldredge AT ap DOT net>
Subject:	Re: special registers in ASM

At 01:19  2/11/1998 -0800, Andrew Crabtree wrote:
>
>Flemming Stig Larsen wrote in message
><01bd371c$3b3ff0a0$b1fcffc2 AT fsl22 DOT novo DOT dk>...
>>I'm going to translate a loop written in C to ASM, but I need more than 8
>>individual 32-bit registers to do it properly
>Wait for the Merced chip.  128 GP Regs. ;)
That is a Good Thing.
>
>> I'm only familar with
>>the 6 standarts(EAX-EDX,ESI,EDI)
>You can also use EBP if you omit the frame pointer.
>
>> Then I read about some special registers in the 386+ ex. DR2, TR5,
>>CR3. My questions are, can I  use them right away?, are they 32bit?,
>>what are the syntax to use them in DJGPP's AT&T inline-assembler?
>
>Did you read the instruction timing for them?  THe debug registers are 10x
>slower than regular registers
>(also 10x slower than a push or a pop instruction), and CR3 is 20x slower.
>This is on a Pentium.  Also,
>you can't do anything with them, just move to and from.  Rewrite your code
>to be more register efficient
>or just push/pop.
Not only that, they are privileged, so using them will result in GPF. You
might be able to if you use CWSDPR0 for your DPMI server, but then you will
get strange results. For instance, a MOV to CR0 might disable protected mode
entirely! Basically, forget about using them. You can't.

Nate Eldredge
eldredge AT ap DOT net

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