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Mail Archives: djgpp/1997/11/30/22:30:04

From: leathm AT solwarra DOT gbrmpa DOT gov DOT au (Leath Muller)
Message-Id: <199712010324.NAA18004@solwarra.gbrmpa.gov.au>
Subject: Re: Blit timing - complicated?
To: rkramer AT xs4all DOT nl
Date: Mon, 1 Dec 1997 13:24:29 +1000 (EST)
Cc: djgpp AT delorie DOT com
In-Reply-To: <65m5fp$k73$1@news2.xs4all.nl> from "rkramer@xs4all.nl" at Nov 28, 97 10:13:13 am

> In a discussion with a friend of mine, he was trying to convince me that it's
> possible to blit a full 800x600 screen in less than a millisecond. I tried to
> tell him otherwise, but couldn't quite get my point through :)
> 
> Can anyone tell me how I could calculate the time it would take to blit a
> full VESA 0x103 screen, using a 486DX2 66 MHz? Is this an easy task, or a
> very difficult one? Do I have to keep in mind:

Is he talking VRAM->VRAM using on-board HW blitting capabilities? New cards
with 100Mhz BUS speeds and running at 128bits can get a fairly high
throughput... :) Of course, I am talking AGP on a new MB. (Which I think
is only available on P2 systems at the moment).

Just throwing another bolt in the box... ;)

Leathal.

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