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Mail Archives: djgpp/1997/07/19/04:02:45

From: p DOT steiner AT t-online DOT de (Peter Steiner)
Newsgroups: comp.os.msdos.djgpp
Subject: Re: Disabling cache?
Date: 16 Jul 1997 21:29:35 GMT
Organization: Telekom Online Internet Gateway
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Message-ID: <5qjefv$r6i$2@news02.btx.dtag.de>
References: <Pine DOT SUN DOT 3 DOT 91 DOT 970709111709 DOT 16266T-100000 AT is> <5q60as$sbk$1 AT news01 DOT btx DOT dtag DOT de> <33CA1D62 DOT 59E2B600 AT sm DOT luth DOT se>
Reply-To: p DOT steiner AT t-online DOT de
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To: djgpp AT delorie DOT com
DJ-Gateway: from newsgroup comp.os.msdos.djgpp

On Mon, 14 Jul 1997 14:36:50 +0200, Johan Karlsson <k AT sm DOT luth DOT se> wrote:
>Peter Steiner wrote:
>> 
>> On Wed, 9 Jul 1997 08:20:16 GMT, Eli Zaretskii <eliz AT is DOT elta DOT co DOT il> wrote:
>> 
>> >Only in the CMOS setup of your machine, if your setup has such an option.
>> 
>> There is a way to disable caching through the page-table
>> Setting bit 3=1 disables write-back and
>> setting bit 4=1 disables caching
>> I don't recommend using this since the chipset normally will take care of
>> it for you.
>
>What I realy would like to do is disabling the cache for a specific
>memory area, either by physical address or linear address returned from
>__dpmi_physical_address_mapping.

These bits exist in each Page-Table-Entry so you can switch the cache for
each page (4-kB-block) separately (if you get access to the Page-Table).

Paul Dixon posted a complete description to this thread so I quit here.

Bye,

Peter Steiner
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