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Mail Archives: djgpp/1997/04/06/17:12:12

Date: Sun, 6 Apr 1997 14:58:37 -0600 (MDT)
From: Ramesh Nallur <nalluri AT nmt DOT edu>
To: djgpp AT delorie DOT com
Subject: Interrupts (Hardware)
Message-ID: <Pine.SUN.3.95.970406144445.11066A-100000@rainbow>
MIME-Version: 1.0

Hai!
I know that there have been too many questions and answers about
interrupts but my question is slightly different, I want to exactly know 
how interrupts are handled by the DPMI server?.
Let me first tell what I know,
When a program runs in PM the IDT is replaced and the interrupts are
caught here. But I think the hardware interrupts are not caught here. As I
understand from the notes they are caught in the real mode. But how is
this possible when the IDT has been replaced. And if they are caught in
the RM, should not be there a switching of modes for every hardware
interrupt? There have been lot of notes about reflecting the RM interrupt
to PM. What exactly does reflecting mean? Does it mean that actually the
table at 0000:0000 is used when a hardware interrupt occurs in PM? Has it
got to do anything with setting up the PIC?
Why cant I just overwrite an IDT entry in PM and expect interrupts to be
caught?
I looked at the code for the __dpmi_set_protected_mode_int_vec and I saw
that there is some restoration or reflection of the RM handlers
(0000:0000). Why is this being done?. 
I am really confused whats happening here..
Could anybody help me please,
Thanks in advance.
  

Ramesh Nallur (Nalluri)			      RES. PH: 505 838 4900.
Address: P.O. BOX. 2145, NM TECH,	      Res. Address: 300, MT. Carmel Ave.
New Mexico Tech, Socorro, New Mexico.	      Socorro, New Mexico.
USA 87801.				      USA 87801.



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