Mail Archives: djgpp/1997/02/09/21:54:32
so does this meen that my code is correct?..and video card just
sucks...and my code would work on a computer with a better video
card???...
On Mon, 10 Feb 1997, Francois Charton wrote:
> KaRNaGE wrote:
> >
> > Video Card: Cirrus Logic SuperVGA (CL-GD5422) with 1 Mb
> > RAM DAC: Cirrus Logic 24 bit DAC
> > Clock Chip: Cirrus 5422/24/26/28 Internal Clock
> > . Installing VBE 2.0 32 bit protected mode extensions
> >
>
> I had one of those (well I still have it, but the machine it is installed
> on refuses to boot...), and experienced several problems with it, when
> trying to use it in VESA modes... Garbage on the screen, errors in the
> detection: it reported 1MB video memory, whilst my card only had 512k. I
> guess it is only half-VESA compliant...
>
> Here is some basic information on how to program it directly (I can send
> you the programs if you want, but it was written for DJGPP v1.x, and will
> require some work to port it to v2.x).
>
> > (this is for mode 101h - 640x480x256)
>
> This mode is 0x005F, so ax=0x005F, int(10h) would do.
>
> Bank switching is done by
>
> outportb(0x3CE,0x09);
> outportb(0x3CF,bank_address);
>
> bank_adress being the starting adress for the bank (bank_nr * 16).
>
>
> This info (and more) can be found in vgadoc4b.zip on simtel, directory
> msdos/vga.
> Also, routines for the Cirrus54xx can be found in Allegro.
>
> Hope this helps
> Francois
>
>
- Raw text -