Mail Archives: djgpp/1996/12/07/08:38:28
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Murray Stokely wrote:
>
> Could someone please post some source to test if a 80486 or better
> processor is present? I know the theory behind it (writing an
> interrupt handler for int6, and trying to execute a 486 instruction)
> But DJGPP kept giving me error messages. I've been coding in Borland
> for too long ;-)
In fact, Mark Habersack and I have been working on just such a beast for
use in my DJVERIFY program. The only problem is that the code crashes
on my computer, although it seems to work perfectly on everybody
else's. As I write this, Mark is working on a new version of the code
which should work a lot better; in the meantime I'll attach the code for
my current getCPU() function. :)
The file is called 'cpu.c', and also contains code for FPU detection.
If anybody would like to test this code on their 486 computers to try to
determine why it crashes, please feel free to do so. I suspect that the
problem actually resides in my hardware, but if anybody else can
reproduce the crash I'd very much like to know.
--
---------------------------------------------------------------------
| John M. Aldrich, aka Fighteer I | fighteer AT cs DOT com |
| Proud owner of what might one | http://www.cs.com/fighteer |
| day be a spectacular MUD... | Plan: To make Bill Gates suffer |
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/************************************************************************
* *
* ------ The DJGPP Installation Diagnostics Program ------ *
* *
* Evaluates your system setup and diagnoses common installation *
* problems with DJGPP. Recommends fixes for most problems and *
* prepares reports suitable for submission to the DJGPP news- *
* group/mailing list. *
* *
* This program is Copyright 1996 John M. Aldrich. You are free *
* to copy any or all of it for your own purposes so long as you *
* give me credit for whatever you use. If you modify this *
* program in any way you MUST retain this copyright notice in *
* its original form. *
* *
* For information on obtaining DJGPP, visit: *
* http://www.delorie.com/djgpp, or download the file: *
* ftp://ftp.simtel.net/pub/simtelnet/gnu/djgpp/v2/readme.1st *
* *
************************************************************************/
/*
* More accurate and inclusive CPU detection routine contributed by
* Mark Habersack. With optimizations on, it crashes, so I moved it into
* 'cpu.c'
*/
/****************************************************************/
/* detects what CPU is installed in the system */
/* Note that this code assumes that the CPU is at least 80386 */
/* */
/* To stay consisitent with the CPUID instruction, this code */
/* returns the following values: */
/* */
/* 2 - i386 (in fact, i386 after reset has 3 in its EDX, but */
/* 3 here is reserved for "old" i486) */
/* 3 - "old" i486 (i.e., one without CPUID instruction) */
/* Codes below come directly from CPUID */
/* 4 - "new" i486 (or AMD K5 processors - not all, though) */
/* 5 - Pentium */
/* 6 - Pentium Pro */
/* 7 - the new Intel/HP processor P9 (a hybrid of RISC & CISC */
/* architecture, not yet available) I read about. */
/****************************************************************/
volatile unsigned getCPU( void )
{
volatile unsigned short wcpu;
/* The code below tries to disable interrupts to be sure that no bit
in eflags register will be modified by interrupt event/handler.
Thanks to Morten for pointing that problem.
*/
asm volatile (
"cli\n"
"movl %%esp, %%ebx\n"
"andl $0xFFFFFFFC, %%esp\n" /* This aligns stack to avoid AC fault */
"pushfl\n"
"popl %%eax\n"
"movl %%eax, %%ecx\n"
"xorl $0x40000, %%eax\n"
"pushl %%eax\n"
"popfl\n"
"pushfl\n"
"popl %%eax\n"
"xorl %%ecx, %%eax\n"
"movw $2, %0\n" /* It's 80386 - cannot flip the AC bit in EFLAGS */
"movl %%ebx, %%esp\n"
"jz 1f\n"
"movl %%esp, %%ebx\n"
"andl $0xFFFFFFFC, %%esp\n" /* This aligns stack to avoid AC fault */
"pushl %%ecx\n"
"popfl\n"
"movl %%ebx, %%esp\n"
"movl $3, %0\n" /* Assume it's i486 */
"movl %%ecx, %%eax\n"
"xorl $0x200000, %%eax\n"
"pushl %%eax\n"
"popfl\n"
"pushfl\n"
"popl %%eax\n"
"xorl %%ecx, %%eax\n"
"je 1f\n" /* If can toggle ID bit in EFLAGS - it's */
"movw $4, %0\n" /* "new" i486 code */
"xorl %%eax, %%eax\n" /* "new" i486 with CPUID instruction */
".byte 0x0F\n" /* or Pentium and higher */
".byte 0xA2\n" /* Issue CPUID instruction code */
"cmpl $1, %%eax\n" /* See whether 1 is supported with CPUID */
"jl 1f\n" /* No. So let's report we have "new" i486 */
"xorl %%eax, %%eax\n"
"incl %%eax\n"
".byte 0x0F\n"
".byte 0xA2\n" /* CPUID again */
"andl $0x0F00, %%eax\n"
"shrl $8, %%eax\n"
"xorb %%ah, %%ah\n"
"movw %%ax, %0\n"
"1:\n"
"sti\n"
: "g=" (wcpu)
:
: "%eax", "%ebx", "%ecx", "%edx", "%ebp" );
return (unsigned)wcpu;
}
/*
* Thanks to Mark Habersack for contributing the following code. Note:
* this must NOT be optimized!
* - John
*/
/* This is an official Intel FPU detection code converted to DJGPP
inline asm.
Note that this code assumes it is being run on at least i386.
On 486 and higher the code returns 1.
*/
int getFPU()
{
unsigned short fpu_status;
int fpu_type;
/*******************************************************************
; This procedure determines the type of FPU in a system
; and sets the fpu_type variable with the appropriate
; value.
; All registers are used by this procedure, none are preserved.
; Coprocessor check
; The algorithm is to determine whether the floating-point
; status and control words can be written to. If not, no
; coprocessor exists. If the status and control words can be
; written to, the correct coprocessor is then determined
; depending on the processor id. The Intel386 CPU can
; work with either an Intel287 NDP or an Intel387 NDP.
; The infinity of the coprocessor must be
; checked to determine the correct coprocessor id.
*********************************************************************/
asm("fninit \n" /* reset FP status word */
"movw $0x5a5ah, %0 \n" /* initialize temp word to */
" \n" /* non-zero value */
"fnstsw %0 \n" /* save FP status word */
"movw %0, %%ax \n" /* check FP status word */
"cmpb $0, %%al \n" /* see if correct status with */
" \n" /* written */
"movw $0, %0 \n" /* no fpu present */
"jne 0f \n"
"/* check_control_word: */ \n"
"fnstcw %0 \n" /* save FP control word */
"mov %0, %%ax \n" /* check FP control word */
"andw $0x103f, %%ax \n" /* see if selected parts */
" \n" /* looks OK */
"cmpw $0x3F, %%ax \n" /* check that 1's & 0's */
" \n" /* correctly read */
"movl $0, %1 \n"
"jne 0f \n"
"movl $1, %1 \n"
"/*\n"
" 80287/80387 check for the Intel386 CPU \n"
"\n"
"check_infinity: */\n"
"fld1 \n" /* must use default control from
FNINIT */
"fldz \n" /* form infinity */
"fdiv \n" /* 8087 and Intel287 NDP say +inf =
-inf */
"fld %%st \n" /* form negative infinity */
"fchs \n" /* Intel387 NDP says +inf <> -inf */
"fcompp \n" /* see if they are the same and
remove them */
"fstsw %0 \n" /* look at status from FCOMPP */
"movw %0, %%ax \n"
"movl $2, %1 \n" /* store Intel287 NDP for fpu type
*/
"sahf \n" /* see if infinities matched */
"jz 0f \n" /* jump if 8087 or Intel287 is
present */
"movl $3, %1 \n" /* store Intel387 NDP for fpu type
*/
"0: \n"
: "=g" (fpu_status),
"=g" (fpu_type));
return fpu_type;
}
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