Date:	Mon, 23 Sep 1996 14:34:29 -0300
Message-Id:	<1.5.4.16.19960923113323.29c78070@dmeasc.rc.ipt.br>
Mime-Version:	1.0
To:	sandmann AT clio DOT rice DOT edu, djgpp AT delorie DOT com
From:	Cesar Scarpini Rabak <csrabak AT dce03 DOT ipt DOT br>
Subject:	Re: Physical Memory Addresses

At 11:45 22/09/96 CDT, Charles Sandmann wrote:
>> BTW, if anyone can tell me how to read the CPU's CR3 register when you
>> are not a protection level 0, I would love you here from you! I'm
>> pretty sure it is impossible without hacking the DPMI server to give
>> you the value through a new (non-DPMI) interface call.
>
>You are right that it's not possible in the general sense.
>There is a back door approach to get this informtion under CWSDPMI, so
>you do this under the ring 3 version.  In general:
>  sgdt  can get you the linear base of the gdt table
>  str   can get you the current task register
>  Looking directly in the gdt table you can compute the base address of
>   the current task structure
>  Offset 1c into that structure will get you your CR3 value.
>If you do this carefully with some checking, you can detect non-CWSDPMI
>hosts and avoid doing bad things.
>

BTW, is there a direct way to ascertain if we're running under CWSDPMI, like
a function call or some "signature" one could check?

TIA.
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Cesar Scarpini Rabak                      E-mail: csrabak AT ipt DOT br
DME/ASC                                   Phone: 55-11-268-35221Ext.350
IPT - Instituto de Pesquisas Tecnologicas Fax:   55-11-268-5996
Av. Prof. Almeida Prado, 532.  Sao Paulo - SP 05508-901 BRAZIL
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