Mail Archives: djgpp/1996/09/23/01:45:02
Interesting... I'll take a shot at something that should be generic
enough to show you the basics; you should modify it as necessary for
your actual needs.
----- begin makefile -----
# Define critical variables here, including the names of all major
# programs you use.
CC = gcc
AR = ar
RM = rm -f
CP = cp
# Next, define variables specifying compiler flags.
DEBUG =
PROF =
C_FLAGS = -Wall -g -O $(DEBUG) #(PROF)
L_FLAGS = $(PROF) -L.
LIBS = -lmylib
# Next, define what files need to be compiled. You can use wildcards
# to get everything in the current directory or specify specific files.
# As you will see later, it doesn't matter whether the source file for
# any given object file is '.c' or '.s'/'.S', because make is capable
# of figuring it out for itself.
PROG_FILES = comm.o data.o file.o handlers.o input.o main.o output.o
user.o
LIB_FILES = func1.o func2.o func3.o term1.o term2.o term3.o
# Okay, here come the rules. Rule format is "target : dependencies",
# followed by the commands for a given rule with leading TABs. You
# must prefix all commands with TAB, or make will barf.
#
# The FIRST rule in a makefile that has commands is treated as the
# default rule.
# Here, I use the automatic variable '$@' to denote the target of the
# current rule. '$@' will be replaced by 'myprog' when the makefile
# is run.
myprog : $(PROG_FILES) libmylib.a
$(CC) $(L_FLAGS) -o $@ $(PROG_FILES) $(LIBS)
# Use this rule if you want only a .exe and not the unstubbed image
# as well by typing 'make myprog.exe'.
myprog.exe : $(PROG_FILES) libmylib.a
$(CC) $(L_FLAGS) -o $@ $(PROG_FILES) $(LIBS)
# Here, I use the automatic variable '$^ to denote ALL listed
dependencies
# of the current target. '$^' will be replaced by the contents of
# $(LIB_FILES) when the makefile is run.
libmylib.a : $(LIB_FILES)
$(AR) rvs $@ $^
# Here is an example of a pattern rule. The '%' here matches the 'stem'
# of any given filename. So '%.o : %.c' means: for each file with the
# extension '.o', its primary dependency is the corresponding file with
# extension '.c', *if that file exists!*
# Also, I use the automatic variable $< to denote the FIRST dependency
# of the current target.
%.o : %.c
$(CC) $(C_FLAGS) -c $<
# This the same as above, but specifies how to compile files with the
# extension '.S'.
%.o : %.S
$(CC) $(C_FLAGS) -c $<
# That's it for the essential stuff. Here are some additional examples
# of "phony" rules which you can use to further control the compilation
# process. When I say "phony", I mean a rule whose target is not an
# actual file. .PHONY is a special target that tells make which targets
# are phony.
.PHONY : all clean extraclean install
all : myprog.exe install
clean :
$(RM) *.o myprog
extraclean : clean
$(RM) myprog.exe libmylib.a
install : myprog.exe
$(CP) myprog.exe ../bin
$(CP) libmylib.a c:/djgpp/lib
----- end makefile -----
> - take all *.cpp and *.c and *.asm files in a given directory (yes,
> all!)
> - take some named .cpp .c and .asm files
Important note! Gcc doesn't recognize the extension '.asm' for
assembler files! You should use '.s' or '.S' to denote these. And
yes, capitalization matters. '.S' indicates that the assembly source
should be preprocessed, which allows #includes, #defines, and other
such things, while '.s' means to skip the preprocessor.
Under DOS, the filenames are the same either way, but when you invoke
gcc, it matters if you use upper or lower case extensions.
Hope this helps!
--
John M. Aldrich <fighteer AT cs DOT com>
* Anything that happens, happens.
* Anything that, in happening, causes something else to happen,
causes something else to happen.
* Anything that, in happening, causes itself to happen again, happens
again.
* It doesn't necessarily do it in chronological order, though.
--- Douglas Adams
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