From patchwork Mon Jul 10 09:41:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: caiyinyu X-Patchwork-Id: 72410 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 56966385AF9F for ; Mon, 10 Jul 2023 09:42:17 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 453EB3858C3A for ; Mon, 10 Jul 2023 09:41:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 453EB3858C3A Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.5]) by gateway (Coremail) with SMTP id _____8BxJvFi0qtk_BEDAA--.9157S3; Mon, 10 Jul 2023 17:41:55 +0800 (CST) Received: from 5.5.5 (unknown [10.2.5.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxriNg0qtkDxgnAA--.5242S4; Mon, 10 Jul 2023 17:41:52 +0800 (CST) From: caiyinyu To: libc-alpha@sourceware.org Cc: adhemerval.zanella@linaro.org, xry111@xry111.site, caiyinyu Subject: [PATCH 1/2] LoongArch: config: Added HAVE_LOONGARCH_VEC_ASM. Date: Mon, 10 Jul 2023 17:41:50 +0800 Message-Id: <20230710094151.3002001-1-caiyinyu@loongson.cn> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8CxriNg0qtkDxgnAA--.5242S4 X-CM-SenderInfo: 5fdl5xhq1xqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBj93XoWxXryDKr13GFWrAF1DKr1ktFc_yoWrGrWDpF y7uFn8JF4xGrn3GanIy3ya9rs5Jr1Skry7Z3WSyw17Cr1UAw1kZr4Fkasxu3Z0q34rJFyY vr4F9w17WFn8AFgCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv 67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07j1YL9UUUUU= X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" This patch checks if assembler supports vector instructions to generate LASX/LSX code or not, and then define HAVE_LOONGARCH_VEC_ASM macro We have added support for vector instructions in binutils-2.41 See: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=75b2f521b101d974354f6ce9ed7c054d8b2e3b7a commit 75b2f521b101d974354f6ce9ed7c054d8b2e3b7a Author: mengqinggang Date: Thu Jun 22 10:35:28 2023 +0800 LoongArch: gas: Add lsx and lasx instructions support gas/ChangeLog: * config/tc-loongarch.c (md_parse_option): Add lsx and lasx option. (loongarch_after_parse_args): Add lsx and lasx option. opcodes/ChangeLog: * loongarch-opc.c (struct loongarch_ase): Add lsx and lasx instructions. --- config.h.in | 5 +++++ sysdeps/loongarch/configure | 28 ++++++++++++++++++++++++++++ sysdeps/loongarch/configure.ac | 15 +++++++++++++++ 3 files changed, 48 insertions(+) diff --git a/config.h.in b/config.h.in index 44a34072a4..0dedc124f7 100644 --- a/config.h.in +++ b/config.h.in @@ -141,6 +141,11 @@ /* LOONGARCH floating-point ABI for ld.so. */ #undef LOONGARCH_ABI_FRLEN +/* Assembler support LoongArch LASX/LSX vector instructions. + This macro becomes obsolete when glibc increased the minimum + required version of GNU 'binutils' to 2.41 or later. */ +#define HAVE_LOONGARCH_VEC_ASM 0 + /* Linux specific: minimum supported kernel version. */ #undef __LINUX_KERNEL_VERSION diff --git a/sysdeps/loongarch/configure b/sysdeps/loongarch/configure index 52bd08a91e..b090e43a24 100644 --- a/sysdeps/loongarch/configure +++ b/sysdeps/loongarch/configure @@ -101,3 +101,31 @@ fi $as_echo "$libc_cv_loongarch_cmodel_medium" >&6; } config_vars="$config_vars have-cmodel-medium = $libc_cv_loongarch_cmodel_medium" + +# Check if asm support vector instructions. +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for vector support in assembler" >&5 +$as_echo_n "checking for vector support in assembler... " >&6; } +if ${libc_cv_loongarch_vec_asm+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat > conftest.s <<\EOF + vld $vr0, $sp, 0 +EOF +if { ac_try='${CC-cc} -c $CFLAGS conftest.s -o conftest 1>&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; }; then + libc_cv_loongarch_vec_asm=yes +else + libc_cv_loongarch_vec_asm=no +fi +rm -f conftest* +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_loongarch_vec_asm" >&5 +$as_echo "$libc_cv_loongarch_vec_asm" >&6; } +if test $libc_cv_loongarch_vec_asm = yes; then + $as_echo "#define HAVE_LOONGARCH_VEC_ASM 1" >>confdefs.h + +fi diff --git a/sysdeps/loongarch/configure.ac b/sysdeps/loongarch/configure.ac index cdd95fa512..39efccfd8f 100644 --- a/sysdeps/loongarch/configure.ac +++ b/sysdeps/loongarch/configure.ac @@ -62,3 +62,18 @@ AC_CACHE_CHECK(whether $CC supports option -mcmodel=medium, libc_cv_loongarch_cmodel_medium=no fi]) LIBC_CONFIG_VAR([have-cmodel-medium], [$libc_cv_loongarch_cmodel_medium]) + +# Check if asm support vector instructions. +AC_CACHE_CHECK(for vector support in assembler, libc_cv_loongarch_vec_asm, [dnl +cat > conftest.s <<\EOF + vld $vr0, $sp, 0 +EOF +if AC_TRY_COMMAND(${CC-cc} -c $CFLAGS conftest.s -o conftest 1>&AS_MESSAGE_LOG_FD); then + libc_cv_loongarch_vec_asm=yes +else + libc_cv_loongarch_vec_asm=no +fi +rm -f conftest*]) +if test $libc_cv_loongarch_vec_asm = yes; then + AC_DEFINE(HAVE_LOONGARCH_VEC_ASM) +fi