From patchwork Thu Dec 11 15:33:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zihong X-Patchwork-Id: 126405 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [127.0.0.1]) by sourceware.org (Postfix) with ESMTP id 1F6334BA2E2E for ; Thu, 11 Dec 2025 15:35:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1F6334BA2E2E X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from cstnet.cn (smtp81.cstnet.cn [159.226.251.81]) by sourceware.org (Postfix) with ESMTPS id 069324BA2E05 for ; Thu, 11 Dec 2025 15:35:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 069324BA2E05 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=isrc.iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=isrc.iscas.ac.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 069324BA2E05 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=159.226.251.81 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1765467323; cv=none; b=Hp389JkS/hBwmI5vSIiLfP87AYfOC84yNXFHGAVmoQ5F1UwYrriSfbwX5um8sxv3UUdzFNQORMrDcMVrAK6NdZdzHGgqqOV+RzSvb6i/YbgGOSDMx+qcnjXQM7DkhpNHHuFPYpXR7jO8u22Qh0j0OF9/0EIuowFPRxJHdRNgQjk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1765467323; c=relaxed/simple; bh=EU4ztSdNsSxvIDCNZ2f77Hm6Cpjgn0gOIOwIfOz4FPA=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=LGPBtF9AKWuA9S4dxjbd5Ms7qhMAAKguFsdJm94PQ8KsUE8Jlg6BKglFbQp4l382Zr4dlx1yJzmtE28+HkYfBrSsQC7SWAzwo9TdOArmzid2TQUGEzxKmGq6mDVRuH4JQyhCzblmiRySpJWYnUzx6L56b9yKXG8vGxXC5j/ygY4= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 069324BA2E05 Received: from Mobilestation.localdomain (unknown [183.6.60.56]) by APP-03 (Coremail) with SMTP id rQCowADX+N9o5Dpp6hNRAA--.23771S3; Thu, 11 Dec 2025 23:34:31 +0800 (CST) From: Yao Zihong To: libc-alpha@sourceware.org Cc: vineetg@rivosinc.com, darius@bluespec.com, adhemerval.zanella@linaro.org, andrew@sifive.com, schwab@linux-m68k.org, bergner@tenstorrent.com, jlaw@ventanamicro.com, jeffreyalaw@gmail.com, palmer@dabbelt.com, jerry.shih@sifive.com, zhangyin2018@iscas.ac.cn, zihongyao@outlook.com, Yao Zihong Subject: [PATCH v5 1/1] riscv: Add RVV memset for both multiarch and non-multiarch builds Date: Thu, 11 Dec 2025 23:33:42 +0800 Message-ID: <20251211153343.63823-2-zihong.plct@isrc.iscas.ac.cn> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251211153343.63823-1-zihong.plct@isrc.iscas.ac.cn> References: <20251211153343.63823-1-zihong.plct@isrc.iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: rQCowADX+N9o5Dpp6hNRAA--.23771S3 X-Coremail-Antispam: 1UD129KBjvAXoW3ZryUGrW5WrWxtF1xJry5urg_yoW8Gr45Go WSgF43Xa17Kr1DCr4rCw4UJ39rWw1fWr4UXa1UZa1kJrn5JF1rCFyFyas8XrW3Kr15WFWf AFWxtFW3tFW3WFn3n29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUO77AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r18M28IrcIa0x kI8VCY1x0267AKxVW8JVW5JwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84AC jcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j6F4UM2 8EF7xvwVC2z280aVAFwI0_Jr0_Gr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4j6r4UJwAS 0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2 IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0 Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02628vn2kIc2 xKxwCY1x0262kKe7AKxVWUtVW8ZwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWU JVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67 kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY 6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0x vEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVj vjDU0xZFpf9x0JU4OJ5UUUUU= X-Originating-IP: [183.6.60.56] X-CM-SenderInfo: p2lk00vjoszunw6l223fol2u1dvotugofq/ X-Spam-Status: No, score=-10.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_PASS, SPF_PASS, TXREP, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces~patchwork=sourceware.org@sourceware.org This patch adds an RVV-optimized implementation of memset for RISC-V and enables it for both multiarch (IFUNC) and non-multiarch builds. The implementation integrates Hau Hsu's 2023 RVV work under a unified ifunc-based framework. A vectorized version (__memset_vector) is added alongside the generic fallback (__memset_generic). The runtime resolver selects the RVV variant when RISCV_HWPROBE_KEY_IMA_EXT_0 reports vector support (RVV). Currently, the resolver still selects the RVV variant even when the RVV extension is disabled via prctl(). As a consequence, any process that has RVV disabled via prctl() will receive SIGILL when calling memset(). Tested on MUSE-Pi (SpacemiT M1). No regressions were observed compared with glibc master when the RVV extension was not disabled via prctl(). Co-authored-by: Jerry Shih Co-authored-by: Jeff Law Signed-off-by: Yao Zihong Reviewed-by: Peter Bergner --- .../riscv/multiarch/dl-symbol-redir-ifunc.h | 26 +++++++++ sysdeps/riscv/multiarch/memset-generic.c | 26 +++++++++ sysdeps/riscv/multiarch/memset-vector.S | 25 ++++++++ sysdeps/riscv/preconfigure | 1 + sysdeps/riscv/preconfigure.ac | 1 + sysdeps/riscv/rv32/rvv/Implies | 2 + sysdeps/riscv/rv64/rvv/Implies | 2 + sysdeps/riscv/rvv/memset.S | 53 +++++++++++++++++ .../unix/sysv/linux/riscv/multiarch/Makefile | 3 + .../linux/riscv/multiarch/ifunc-impl-list.c | 22 +++++-- .../unix/sysv/linux/riscv/multiarch/memset.c | 58 +++++++++++++++++++ 11 files changed, 215 insertions(+), 4 deletions(-) create mode 100644 sysdeps/riscv/multiarch/dl-symbol-redir-ifunc.h create mode 100644 sysdeps/riscv/multiarch/memset-generic.c create mode 100644 sysdeps/riscv/multiarch/memset-vector.S create mode 100644 sysdeps/riscv/rv32/rvv/Implies create mode 100644 sysdeps/riscv/rv64/rvv/Implies create mode 100644 sysdeps/riscv/rvv/memset.S create mode 100644 sysdeps/unix/sysv/linux/riscv/multiarch/memset.c diff --git a/sysdeps/riscv/multiarch/dl-symbol-redir-ifunc.h b/sysdeps/riscv/multiarch/dl-symbol-redir-ifunc.h new file mode 100644 index 0000000000..2ff7369678 --- /dev/null +++ b/sysdeps/riscv/multiarch/dl-symbol-redir-ifunc.h @@ -0,0 +1,26 @@ +/* Symbol redirection for loader/static initialization code. + Copyright (C) 2025 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifndef _DL_IFUNC_GENERIC_H +#define _DL_IFUNC_GENERIC_H + +#ifndef SHARED +asm ("memset = __memset_generic"); +#endif + +#endif diff --git a/sysdeps/riscv/multiarch/memset-generic.c b/sysdeps/riscv/multiarch/memset-generic.c new file mode 100644 index 0000000000..c93bb43c8f --- /dev/null +++ b/sysdeps/riscv/multiarch/memset-generic.c @@ -0,0 +1,26 @@ +/* Re-include the default memset implementation. + Copyright (C) 2025 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +#if IS_IN(libc) +# define MEMSET __memset_generic +# undef libc_hidden_builtin_def +# define libc_hidden_builtin_def(x) +#endif +#include diff --git a/sysdeps/riscv/multiarch/memset-vector.S b/sysdeps/riscv/multiarch/memset-vector.S new file mode 100644 index 0000000000..15d262b0c7 --- /dev/null +++ b/sysdeps/riscv/multiarch/memset-vector.S @@ -0,0 +1,25 @@ + +/* RVV versions memset. RISC-V version. + Copyright (C) 2025 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if IS_IN(libc) +# define MEMSET __memset_vector +# undef libc_hidden_builtin_def +# define libc_hidden_builtin_def(name) +#include +#endif diff --git a/sysdeps/riscv/preconfigure b/sysdeps/riscv/preconfigure index a96cd0d7f8..92ffa1ac02 100644 --- a/sysdeps/riscv/preconfigure +++ b/sysdeps/riscv/preconfigure @@ -60,6 +60,7 @@ riscv*) version=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | sed -n 's/^#define __GNUC__ \(.*\)/\1/p'` test $version -lt 15 && as_fn_error 1 "glibc requires GCC 15 or later for the V extension" "$LINENO" 5 test $vector -lt "1000000" && as_fn_error 1 "glibc requires at least RVV 1.0 for the V extension" "$LINENO" 5 + float_machine=rvv fi base_machine=riscv diff --git a/sysdeps/riscv/preconfigure.ac b/sysdeps/riscv/preconfigure.ac index f95ffe83fb..99fbb0c9c9 100644 --- a/sysdeps/riscv/preconfigure.ac +++ b/sysdeps/riscv/preconfigure.ac @@ -60,6 +60,7 @@ riscv*) version=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | sed -n 's/^#define __GNUC__ \(.*\)/\1/p'` test $version -lt 15 && AC_MSG_ERROR([glibc requires GCC 15 or later for the V extension], [1]) test $vector -lt "1000000" && AC_MSG_ERROR([glibc requires at least RVV 1.0 for the V extension], [1]) + float_machine=rvv fi base_machine=riscv diff --git a/sysdeps/riscv/rv32/rvv/Implies b/sysdeps/riscv/rv32/rvv/Implies new file mode 100644 index 0000000000..25ce1df222 --- /dev/null +++ b/sysdeps/riscv/rv32/rvv/Implies @@ -0,0 +1,2 @@ +riscv/rv32/rvd +riscv/rvv diff --git a/sysdeps/riscv/rv64/rvv/Implies b/sysdeps/riscv/rv64/rvv/Implies new file mode 100644 index 0000000000..9993bb30e3 --- /dev/null +++ b/sysdeps/riscv/rv64/rvv/Implies @@ -0,0 +1,2 @@ +riscv/rv64/rvd +riscv/rvv diff --git a/sysdeps/riscv/rvv/memset.S b/sysdeps/riscv/rvv/memset.S new file mode 100644 index 0000000000..2b81a937f5 --- /dev/null +++ b/sysdeps/riscv/rvv/memset.S @@ -0,0 +1,53 @@ +/* RISC-V RVV based memset. + Copyright (C) 2025 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +#ifndef MEMSET +# define MEMSET memset +#endif + +#define dst a0 +#define value a1 +#define num a2 + +#define ivl a3 +#define dst_ptr a5 + +#define ELEM_LMUL_SETTING m8 +#define vdata v0 + +ENTRY (MEMSET) +.option push +.option arch, +v + mv dst_ptr, dst + + vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma + vmv.v.x vdata, value +L(loop): + vse8.v vdata, (dst_ptr) + sub num, num, ivl + add dst_ptr, dst_ptr, ivl + vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma + bnez num, L(loop) + + ret +.option pop +END (MEMSET) +libc_hidden_builtin_def (memset) diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile b/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile index fcef5659d4..1d26966ded 100644 --- a/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile @@ -3,6 +3,9 @@ sysdep_routines += \ memcpy \ memcpy-generic \ memcpy_noalignment \ + memset \ + memset-generic \ + memset-vector \ # sysdep_routines CFLAGS-memcpy_noalignment.c += -mno-strict-align diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c index 1c1deca8f6..87456f3370 100644 --- a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c @@ -27,17 +27,31 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, size_t i = max; bool fast_unaligned = false; + bool rvv_enabled = false; - struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_CPUPERF_0 }; - if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0 - && (pair.value & RISCV_HWPROBE_MISALIGNED_MASK) + struct riscv_hwprobe pairs[2] = { + {.key = RISCV_HWPROBE_KEY_CPUPERF_0}, + {.key = RISCV_HWPROBE_KEY_IMA_EXT_0} + }; + + if (__riscv_hwprobe (pairs, 2, 0, NULL, 0) == 0) { + if ((pairs[0].value & RISCV_HWPROBE_MISALIGNED_MASK) == RISCV_HWPROBE_MISALIGNED_FAST) - fast_unaligned = true; + fast_unaligned = true; + + if (pairs[1].value & RISCV_HWPROBE_IMA_V) + rvv_enabled = true; + } IFUNC_IMPL (i, name, memcpy, IFUNC_IMPL_ADD (array, i, memcpy, fast_unaligned, __memcpy_noalignment) IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_generic)) + IFUNC_IMPL (i, name, memset, + IFUNC_IMPL_ADD (array, i, memset, rvv_enabled, + __memset_vector) + IFUNC_IMPL_ADD (array, i, memset, 1, __memset_generic)) + return 0; } diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/memset.c b/sysdeps/unix/sysv/linux/riscv/multiarch/memset.c new file mode 100644 index 0000000000..166427bff8 --- /dev/null +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/memset.c @@ -0,0 +1,58 @@ +/* Multiple versions of memset. + All versions must be listed in ifunc-impl-list.c. + Copyright (C) 2025 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if IS_IN (libc) +/* Redefine memset so that the compiler won't complain about the type + mismatch with the IFUNC selector in strong_alias, below. */ +# undef memset +# define memset __redirect_memset +# include +# include +# include +# include +# include + +extern __typeof (__redirect_memset) __libc_memset; + +extern __typeof (__redirect_memset) __memset_generic attribute_hidden; +extern __typeof (__redirect_memset) __memset_vector attribute_hidden; + +static inline __typeof (__redirect_memset) * +select_memset_ifunc (uint64_t dl_hwcap, __riscv_hwprobe_t hwprobe_func) +{ + unsigned long long v; + + if (__riscv_hwprobe_one (hwprobe_func, RISCV_HWPROBE_KEY_IMA_EXT_0, &v) == 0 + && (v & RISCV_HWPROBE_IMA_V) == RISCV_HWPROBE_IMA_V) + return __memset_vector; + + return __memset_generic; +} + +riscv_libc_ifunc (__libc_memset, select_memset_ifunc); + +# undef memset +strong_alias (__libc_memset, memset); +# ifdef SHARED +__hidden_ver1 (memset, __GI_memset, __redirect_memset) + __attribute__ ((visibility ("hidden"))) __attribute_copy__ (memset); +# endif +#else +# include +#endif