From patchwork Tue Sep 30 00:56:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zihong X-Patchwork-Id: 121019 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 70C45385841F for ; Tue, 30 Sep 2025 00:58:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 70C45385841F X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from cstnet.cn (smtp84.cstnet.cn [159.226.251.84]) by sourceware.org (Postfix) with ESMTPS id 26DB9385800F for ; Tue, 30 Sep 2025 00:57:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 26DB9385800F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=isrc.iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=isrc.iscas.ac.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 26DB9385800F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=159.226.251.84 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1759193865; cv=none; b=hQxyD1MPGBZA5cESCSE99b117fPF9RobwrHkLZcpqf4ccnGFXZO+Bd49PPVeTljIRNzJuXVUxZZ5OBIghc5B8ZLx+bM2/xWxww+GlvZWygF1FaysPp6OhBTpuScK/mkj/iLq0pWlGUiDwqRtu/BewaDx1vKAB3/e/5kEBw65Vw0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1759193865; c=relaxed/simple; bh=hhHUpM457xBKOX/D6n/hZOicDpl0sJ5q4ehwfGBZt2o=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=axAxuHqBF/QRJhs58Qb2TFExG9jlim3nZMber7WdDMcz446AznCcRJDillEEMkaOPKb4M6YUWd7OqNvznh14pMud8eoPB7iIrGlOyK1gYHdiAIxmtSCaWgkgo/87X1h/knhCwVGeZKkbing4NSwcaWHGfCWt+tyafwzosgsDsI4= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 26DB9385800F Received: from Mobilestation.localdomain (unknown [183.6.60.69]) by APP-05 (Coremail) with SMTP id zQCowAAHqhPxKttorL0WCQ--.11769S6; Tue, 30 Sep 2025 08:57:33 +0800 (CST) From: Yao Zihong To: libc-alpha@sourceware.org Cc: bergner@linux.ibm.com, evan@rivosinc.com, jlaw@ventanamicro.com, palmer@dabbelt.com, vineetg@rivosinc.com, zhangyin2018@iscas.ac.cn, zihong.plct@isrc.iscas.ac.cn, zihongyao@outlook.com Subject: [RFC PATCH v2 4/4] riscv: Add test for hwcaps-subdir Date: Tue, 30 Sep 2025 08:56:56 +0800 Message-ID: <20250930005715.95436-5-zihong.plct@isrc.iscas.ac.cn> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250930005715.95436-1-zihong.plct@isrc.iscas.ac.cn> References: <20250930005715.95436-1-zihong.plct@isrc.iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: zQCowAAHqhPxKttorL0WCQ--.11769S6 X-Coremail-Antispam: 1UD129KBjvJXoWxGFWDGFy8ur1Dur17uFWxZwb_yoW7Jryrpa 98uF93Grs3XF1xJFs7uF4fta93G3WrXFy5CrWxCw18ArnrXr4rXr42vrn5GFyfWFWrZF4D urZ8GFyYkrn8C3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUPj14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr 1l84ACjcxK6I8E87Iv67AKxVWUJVW8JwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gr1j6F4U JwAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7 IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4U M4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY1x0262kKe7AKxVWUtV W8ZwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v2 6r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2 Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_ Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMI IF0xvEx4A2jsIEc7CjxVAFwI0_Gr1j6F4UJbIYCTnIWIevJa73UjIFyTuYvjfUOyIUUUUU U X-Originating-IP: [183.6.60.69] X-CM-SenderInfo: p2lk00vjoszunw6l223fol2u1dvotugofq/ X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces~patchwork=sourceware.org@sourceware.org Introduce basic tests for RISC-V glibc-hwcaps subdirs(rva20u64), similar to existing powerpc/x86 coverage. Signed-off-by: Yao Zihong --- elf/Makefile | 2 +- elf/tst-glibc-hwcaps-cache.script | 10 +++++ sysdeps/riscv/Makefile | 6 +++ sysdeps/riscv/tst-glibc-hwcaps.c | 64 +++++++++++++++++++++++++++++++ 4 files changed, 81 insertions(+), 1 deletion(-) create mode 100644 sysdeps/riscv/tst-glibc-hwcaps.c diff --git a/elf/Makefile b/elf/Makefile index 5a676f858d..54703e761a 100644 --- a/elf/Makefile +++ b/elf/Makefile @@ -2884,7 +2884,7 @@ $(objpfx)argv0test.out: tst-rtld-argv0.sh $(objpfx)ld.so \ # glibc-hwcaps mechanism for this architecture). Used to obtain test # coverage for some glibc-hwcaps tests for the widest possible range # of systems. -glibc-hwcaps-first-subdirs-for-tests = power9 x86-64-v2 z13 +glibc-hwcaps-first-subdirs-for-tests = power9 x86-64-v2 z13 rva20u64 # The test modules are parameterized by preprocessor macros. LDFLAGS-libmarkermod1-1.so += -Wl,-soname,libmarkermod1.so diff --git a/elf/tst-glibc-hwcaps-cache.script b/elf/tst-glibc-hwcaps-cache.script index af89e9c6f8..b85b8224bf 100644 --- a/elf/tst-glibc-hwcaps-cache.script +++ b/elf/tst-glibc-hwcaps-cache.script @@ -43,3 +43,13 @@ mkdirp 0770 $L/glibc-hwcaps/x86-64-v4 cp $B/elf/libmarkermod4-2.so $L/glibc-hwcaps/x86-64-v2/libmarkermod4.so cp $B/elf/libmarkermod4-3.so $L/glibc-hwcaps/x86-64-v3/libmarkermod4.so cp $B/elf/libmarkermod4-4.so $L/glibc-hwcaps/x86-64-v4/libmarkermod4.so + +mkdirp 0770 $L/glibc-hwcaps/rva20u64 +cp $B/elf/libmarkermod2-2.so $L/glibc-hwcaps/rva20u64/libmarkermod2.so +mkdirp 0770 $L/glibc-hwcaps/rva22u64 +cp $B/elf/libmarkermod3-2.so $L/glibc-hwcaps/rva20u64/libmarkermod3.so +cp $B/elf/libmarkermod3-3.so $L/glibc-hwcaps/rva22u64/libmarkermod3.so +mkdirp 0770 $L/glibc-hwcaps/rva23u64 +cp $B/elf/libmarkermod4-2.so $L/glibc-hwcaps/rva20u64/libmarkermod4.so +cp $B/elf/libmarkermod4-3.so $L/glibc-hwcaps/rva22u64/libmarkermod4.so +cp $B/elf/libmarkermod4-4.so $L/glibc-hwcaps/rva23u64/libmarkermod4.so diff --git a/sysdeps/riscv/Makefile b/sysdeps/riscv/Makefile index 7d149d42e6..be49c6fcf5 100644 --- a/sysdeps/riscv/Makefile +++ b/sysdeps/riscv/Makefile @@ -37,6 +37,12 @@ $(objpfx)glibc-hwcaps/rva23u64/libmarkermod4.so: $(objpfx)libmarkermod4-4.so $(make-target-directory) cp $< $@ +ifeq (no,$(build-hardcoded-path-in-tests)) +# This is an ld.so.cache test, and RPATH/RUNPATH in the executable +# interferes with its test objectives. +tests-container += tst-glibc-hwcaps-cache +endif + endif # RISC-V's assembler also needs to know about PIC as it changes the definition diff --git a/sysdeps/riscv/tst-glibc-hwcaps.c b/sysdeps/riscv/tst-glibc-hwcaps.c new file mode 100644 index 0000000000..c1396cf39b --- /dev/null +++ b/sysdeps/riscv/tst-glibc-hwcaps.c @@ -0,0 +1,64 @@ +/* glibc-hwcaps subdirectory test. RISC-V version. + Copyright (C) 2025 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include +#include +#include +#include + +extern int marker2 (void); +extern int marker3 (void); +extern int marker4 (void); + +/* Return the RISC-V profile level, 1 for the baseline. */ +static int +compute_level (void) +{ + unsigned int profile_level = get_profile_level (); + + if(profile_level < 20) { + return 1; + } + + /* v2: RVA20U64 */ + if(profile_level < 22) { + return 2; + } + + /* v3: RVA22U64 */ + if(profile_level < 23) { + return 3; + } + + /* v4: RVA23U64 */ + return 4; +} + +static int +do_test (void) +{ + int level = compute_level (); + printf ("info: detected RISC-V micro-architecture level: %d\n", level); + TEST_COMPARE (marker2 (), MIN (level, 2)); + TEST_COMPARE (marker3 (), MIN (level, 3)); + TEST_COMPARE (marker4 (), MIN (level, 4)); + return 0; +} + +#include