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Date: Sun, 10 Dec 2023 15:10:58 +0800 Message-Id: <20231210071058.2947197-1-caiyinyu@loongson.cn> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8DxkN2FZHVl4jdaAA--.5416S4 X-CM-SenderInfo: 5fdl5xhq1xqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBj93XoWxGF4rKF4DXry8GFyxGr4xKrX_yoWrXr4Dpr 4UGa4xtrnYkF40yF15tr98J3Z0k395t3s2vF42yF13Wr1I9r18ArZIyryrJrnrtF45tay7 KryUZws0qr15t3cCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkjb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ Gr0_Gr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv67AK xVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I 0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07UNvtZUUUUU= X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Backported from glibc 2.39 development. --- sysdeps/loongarch/dl-trampoline.h | 68 +++++++++++++++---------------- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/sysdeps/loongarch/dl-trampoline.h b/sysdeps/loongarch/dl-trampoline.h index 02375286f8..99fcacab76 100644 --- a/sysdeps/loongarch/dl-trampoline.h +++ b/sysdeps/loongarch/dl-trampoline.h @@ -19,9 +19,9 @@ /* Assembler veneer called from the PLT header code for lazy loading. The PLT header passes its own args in t0-t2. */ #ifdef USE_LASX -# define FRAME_SIZE (-((-9 * SZREG - 8 * SZFREG - 8 * SZXREG) & ALMASK)) +# define FRAME_SIZE (-((-9 * SZREG - 8 * SZXREG) & ALMASK)) #elif defined USE_LSX -# define FRAME_SIZE (-((-9 * SZREG - 8 * SZFREG - 8 * SZVREG) & ALMASK)) +# define FRAME_SIZE (-((-9 * SZREG - 8 * SZVREG) & ALMASK)) #elif !defined __loongarch_soft_float # define FRAME_SIZE (-((-9 * SZREG - 8 * SZFREG) & ALMASK)) #else @@ -44,23 +44,23 @@ ENTRY (_dl_runtime_resolve) REG_S a7, sp, 8*SZREG #ifdef USE_LASX - xvst xr0, sp, 9*SZREG + 8*SZFREG + 0*SZXREG - xvst xr1, sp, 9*SZREG + 8*SZFREG + 1*SZXREG - xvst xr2, sp, 9*SZREG + 8*SZFREG + 2*SZXREG - xvst xr3, sp, 9*SZREG + 8*SZFREG + 3*SZXREG - xvst xr4, sp, 9*SZREG + 8*SZFREG + 4*SZXREG - xvst xr5, sp, 9*SZREG + 8*SZFREG + 5*SZXREG - xvst xr6, sp, 9*SZREG + 8*SZFREG + 6*SZXREG - xvst xr7, sp, 9*SZREG + 8*SZFREG + 7*SZXREG + xvst xr0, sp, 9*SZREG + 0*SZXREG + xvst xr1, sp, 9*SZREG + 1*SZXREG + xvst xr2, sp, 9*SZREG + 2*SZXREG + xvst xr3, sp, 9*SZREG + 3*SZXREG + xvst xr4, sp, 9*SZREG + 4*SZXREG + xvst xr5, sp, 9*SZREG + 5*SZXREG + xvst xr6, sp, 9*SZREG + 6*SZXREG + xvst xr7, sp, 9*SZREG + 7*SZXREG #elif defined USE_LSX - vst vr0, sp, 9*SZREG + 8*SZFREG + 0*SZVREG - vst vr1, sp, 9*SZREG + 8*SZFREG + 1*SZVREG - vst vr2, sp, 9*SZREG + 8*SZFREG + 2*SZVREG - vst vr3, sp, 9*SZREG + 8*SZFREG + 3*SZVREG - vst vr4, sp, 9*SZREG + 8*SZFREG + 4*SZVREG - vst vr5, sp, 9*SZREG + 8*SZFREG + 5*SZVREG - vst vr6, sp, 9*SZREG + 8*SZFREG + 6*SZVREG - vst vr7, sp, 9*SZREG + 8*SZFREG + 7*SZVREG + vst vr0, sp, 9*SZREG + 0*SZVREG + vst vr1, sp, 9*SZREG + 1*SZVREG + vst vr2, sp, 9*SZREG + 2*SZVREG + vst vr3, sp, 9*SZREG + 3*SZVREG + vst vr4, sp, 9*SZREG + 4*SZVREG + vst vr5, sp, 9*SZREG + 5*SZVREG + vst vr6, sp, 9*SZREG + 6*SZVREG + vst vr7, sp, 9*SZREG + 7*SZVREG #elif !defined __loongarch_soft_float FREG_S fa0, sp, 9*SZREG + 0*SZFREG FREG_S fa1, sp, 9*SZREG + 1*SZFREG @@ -92,23 +92,23 @@ ENTRY (_dl_runtime_resolve) REG_L a7, sp, 8*SZREG #ifdef USE_LASX - xvld xr0, sp, 9*SZREG + 8*SZFREG + 0*SZXREG - xvld xr1, sp, 9*SZREG + 8*SZFREG + 1*SZXREG - xvld xr2, sp, 9*SZREG + 8*SZFREG + 2*SZXREG - xvld xr3, sp, 9*SZREG + 8*SZFREG + 3*SZXREG - xvld xr4, sp, 9*SZREG + 8*SZFREG + 4*SZXREG - xvld xr5, sp, 9*SZREG + 8*SZFREG + 5*SZXREG - xvld xr6, sp, 9*SZREG + 8*SZFREG + 6*SZXREG - xvld xr7, sp, 9*SZREG + 8*SZFREG + 7*SZXREG + xvld xr0, sp, 9*SZREG + 0*SZXREG + xvld xr1, sp, 9*SZREG + 1*SZXREG + xvld xr2, sp, 9*SZREG + 2*SZXREG + xvld xr3, sp, 9*SZREG + 3*SZXREG + xvld xr4, sp, 9*SZREG + 4*SZXREG + xvld xr5, sp, 9*SZREG + 5*SZXREG + xvld xr6, sp, 9*SZREG + 6*SZXREG + xvld xr7, sp, 9*SZREG + 7*SZXREG #elif defined USE_LSX - vld vr0, sp, 9*SZREG + 8*SZFREG + 0*SZVREG - vld vr1, sp, 9*SZREG + 8*SZFREG + 1*SZVREG - vld vr2, sp, 9*SZREG + 8*SZFREG + 2*SZVREG - vld vr3, sp, 9*SZREG + 8*SZFREG + 3*SZVREG - vld vr4, sp, 9*SZREG + 8*SZFREG + 4*SZVREG - vld vr5, sp, 9*SZREG + 8*SZFREG + 5*SZVREG - vld vr6, sp, 9*SZREG + 8*SZFREG + 6*SZVREG - vld vr7, sp, 9*SZREG + 8*SZFREG + 7*SZVREG + vld vr0, sp, 9*SZREG + 0*SZVREG + vld vr1, sp, 9*SZREG + 1*SZVREG + vld vr2, sp, 9*SZREG + 2*SZVREG + vld vr3, sp, 9*SZREG + 3*SZVREG + vld vr4, sp, 9*SZREG + 4*SZVREG + vld vr5, sp, 9*SZREG + 5*SZVREG + vld vr6, sp, 9*SZREG + 6*SZVREG + vld vr7, sp, 9*SZREG + 7*SZVREG #elif !defined __loongarch_soft_float FREG_L fa0, sp, 9*SZREG + 0*SZFREG FREG_L fa1, sp, 9*SZREG + 1*SZFREG