From patchwork Fri Mar 28 08:26:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Weimer X-Patchwork-Id: 109411 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 818AC3858D37 for ; Fri, 28 Mar 2025 08:26:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 818AC3858D37 Authentication-Results: sourceware.org; dkim=pass (1024-bit key, unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=fgJ34X1x X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTP id 1ECC13858D20 for ; Fri, 28 Mar 2025 08:26:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1ECC13858D20 Authentication-Results: sourceware.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 1ECC13858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1743150372; cv=none; b=Aqz4JL02OAqIhkbf91rb0PbUTKSjuYaxozN8eqGw3eZTkPUkTQG26JQPCF35Hbk6iRK8FLxfsU81UdV9C7c4d+6m7vR615P4S3aplCVPeWCxKuQuzutxEppOYaaO+FajpJI9PB8I+MRzgEzE7RemDOgtYh1FwAjUivpzPQx7ejM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1743150372; c=relaxed/simple; bh=JItklRW2jqqzUPMPCS9H1408rfqokU5HbQ4boKSUnTA=; h=DKIM-Signature:From:To:Subject:Message-ID:Date:MIME-Version; b=vSGJzxWOgDlJbpm6ATF8TW77Ctcxr/q8m+mTHbBUGCqOjlLbkUBA/ZKeN4TQv7913oqE4PJSAfqjgcUTNFdfJXyCBpxKQoCJeY+c8UVhEpdEkB/MUp3m0hh0bM4XXJa92tT9N0vBLLg9uxw8Uiw28jCafLhBMVV+hzazwa/cVdw= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1ECC13858D20 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1743150371; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type; bh=ejb3k8eOkA5KQAcrcsZmTSJm9bUPauMnJHA030+MpuA=; b=fgJ34X1x15qX04YTz8SFre8G5JHsCuaaNQYjGxF8U9aoNQs//1bH//jfkqQ/YsIEohSawX RvGLDHsaInOCy7f//qU+z3qsooQx01pnLLxTGccx53CTK8JjcENNEzvqLJYcL9RgWmmbaz FXzQS+drufZjjgk/nhCiWwmYvqWW3T0= Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-587-PIlLTD3HNXOqYYLccg43zw-1; Fri, 28 Mar 2025 04:26:10 -0400 X-MC-Unique: PIlLTD3HNXOqYYLccg43zw-1 X-Mimecast-MFC-AGG-ID: PIlLTD3HNXOqYYLccg43zw_1743150369 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 9C680180035C for ; Fri, 28 Mar 2025 08:26:09 +0000 (UTC) Received: from oldenburg.str.redhat.com (unknown [10.2.16.23]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id E90B9180174E for ; Fri, 28 Mar 2025 08:26:08 +0000 (UTC) From: Florian Weimer To: libc-alpha@sourceware.org Subject: [PATCH v3 1/2] x86: Skip XSAVE state size reset if ISA level requires XSAVE Message-ID: X-From-Line: ce15b7847b065b4fe279e9fba97da540a56f4549 Mon Sep 17 00:00:00 2001 Date: Fri, 28 Mar 2025 09:26:06 +0100 User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: npuVbw43DmqkDOtiNnJ7-jf6lpoZaHr_dcJn6ZAkMo4_1743150369 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces~patchwork=sourceware.org@sourceware.org If we have to use XSAVE or XSAVEC trampolines, do not adjust the size information they need. Technically, it is an operator error to try to run with -XSAVE,-XSAVEC on such builds, but this change here disables some unnecessary code with higher ISA levels and simplifies testing. Related to commit befe2d3c4dec8be2cdd01a47132e47bdb7020922 ("x86-64: Don't use SSE resolvers for ISA level 3 or above"). --- v3: Use AVX build flag for the decision, not ISA level. sysdeps/x86/cpu-features.c | 5 +++++ 1 file changed, 5 insertions(+) base-commit: be61b9493d38032519e596f282f9695667402c8d diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 27abaca8b7..6dfb112038 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -24,6 +24,7 @@ #include #include #include +#include extern void TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *) attribute_hidden; @@ -1159,6 +1160,9 @@ no_cpuid: TUNABLE_CALLBACK (set_prefer_map_32bit_exec)); #endif + /* Do not add the logic to disable XSAVE/XSAVEC if this glibc build + requires AVX and therefore XSAVE or XSAVEC support. */ +#ifndef GCCMACRO__AVX__ bool disable_xsave_features = false; if (!CPU_FEATURE_USABLE_P (cpu_features, OSXSAVE)) @@ -1212,6 +1216,7 @@ no_cpuid: CPU_FEATURE_UNSET (cpu_features, FMA4); } +#endif #ifdef __x86_64__ GLRO(dl_hwcap) = HWCAP_X86_64; From patchwork Fri Mar 28 08:26:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Weimer X-Patchwork-Id: 109412 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5C434385B500 for ; Fri, 28 Mar 2025 08:27:53 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5C434385B500 Authentication-Results: sourceware.org; dkim=pass (1024-bit key, unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=BUm++WXL X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTP id CA61F382E285 for ; Fri, 28 Mar 2025 08:27:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CA61F382E285 Authentication-Results: sourceware.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org CA61F382E285 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1743150428; cv=none; b=an+3+yrH92NO5GXo+AA7aC5ttXY4T6hvTz4zhzCO9LnAWBbwawmdPYqOXF0XYqcQDee7MOvAf008lCMQyyv/87PPBg9/kjKKSCicvxtAJlnaMipJfy24QOR6MEPVNCA7sBPRoCNzYgQwDBayMd3vXeTiC+l/34k6TWpmHyrmKFE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1743150428; c=relaxed/simple; bh=rKTDhcqzle5rRF5LIh103zGiGHVd+TYyyIP8GfGNSFs=; h=DKIM-Signature:From:To:Subject:Message-ID:Date:MIME-Version; b=hImHJeCsRWe0MNdIA6oge2A3RhbiQclyFmeTK8waIWsCW5Zj2LZ4pUtY+/jciWLkgE7Kxfn2InvjSu/fWgB7d3Qx19UxX+AqLBySD0ESSFAtBodsDpK5zOiGfPp+2EBJPVPA96Y1UCqVwPvdjJn4n6fqZINyDqYb5tUeS7viVfY= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CA61F382E285 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1743150428; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=Bza0X1hMPhEWPzf4oXT8MH+zYNfKrN1J6TECO0FtmMU=; b=BUm++WXLIyvVOkKeeIHj//gJvd3qZ/LS3SU4SFFXa1DK10N5yp6G/SOeDKW2NqcufXBuGN nYUZ/83pK+jue7oE5PvjPZpl4hOFl/K9UCuztGV/73I6/f+4920Ui8hrV8GzNF0dzUovVB IjGc1sCyjQZMynHWrXLwmvO2KWEXSoA= Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-587-2gr0l6DiMAKlDq-Sdn5M-Q-1; Fri, 28 Mar 2025 04:27:05 -0400 X-MC-Unique: 2gr0l6DiMAKlDq-Sdn5M-Q-1 X-Mimecast-MFC-AGG-ID: 2gr0l6DiMAKlDq-Sdn5M-Q_1743150424 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 2022A1809CA3; Fri, 28 Mar 2025 08:27:04 +0000 (UTC) Received: from oldenburg.str.redhat.com (unknown [10.2.16.23]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 8CB39180886C; Fri, 28 Mar 2025 08:27:02 +0000 (UTC) From: Florian Weimer To: libc-alpha@sourceware.org Cc: "H.J. Lu" , Sunil K Pandey Subject: [PATCH v3 2/2] x86: Use separate variable for TLSDESC XSAVE/XSAVEC state size (bug 32810) In-Reply-To: Message-ID: <83605da170d63cad135c0c35b59c78402a765867.1743150324.git.fweimer@redhat.com> References: X-From-Line: 83605da170d63cad135c0c35b59c78402a765867 Mon Sep 17 00:00:00 2001 Date: Fri, 28 Mar 2025 09:26:59 +0100 User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: wvC50dWps8QFGdR00bhMKL789ond92SoZsiG8v6hlYQ_1743150424 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces~patchwork=sourceware.org@sourceware.org Previously, the initialization code reused the xsave_state_full_size member of struct cpu_features for the TLSDESC state size. However, the tunable processing code assumes that this member has the original XSAVE (non-compact) state size, so that it can use its value if XSAVEC is disabled via tunable. This change uses a separate variable and not a struct member because the value is only needed in ld.so and the static libc, but not in libc.so. As a result, struct cpu_features layout does not change, helping a future backport of this change. Fixes commit 9b7091415af47082664717210ac49d51551456ab ("x86-64: Update _dl_tlsdesc_dynamic to preserve AMX registers"). --- v3: No real change, H.J.'s review comment is addressed in first patch. sysdeps/x86/Makefile | 19 +++++++++++++++++++ sysdeps/x86/cpu-features.c | 11 ++++++----- sysdeps/x86/cpu-tunables.c | 2 ++ sysdeps/x86/dl-diagnostics-cpu.c | 2 ++ sysdeps/x86/include/cpu-features.h | 9 +++++++-- sysdeps/x86/tst-gnu2-tls2-x86-noxsave.c | 1 + sysdeps/x86/tst-gnu2-tls2-x86-noxsavec.c | 1 + sysdeps/x86/tst-gnu2-tls2-x86-noxsavexsavec.c | 1 + sysdeps/x86_64/dl-tlsdesc-dynamic.h | 2 +- 9 files changed, 40 insertions(+), 8 deletions(-) create mode 100644 sysdeps/x86/tst-gnu2-tls2-x86-noxsave.c create mode 100644 sysdeps/x86/tst-gnu2-tls2-x86-noxsavec.c create mode 100644 sysdeps/x86/tst-gnu2-tls2-x86-noxsavexsavec.c diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index 5311b594af..8819fba1b7 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -21,6 +21,9 @@ tests += \ tst-cpu-features-supports-static \ tst-get-cpu-features \ tst-get-cpu-features-static \ + tst-gnu2-tls2-x86-noxsave \ + tst-gnu2-tls2-x86-noxsavec \ + tst-gnu2-tls2-x86-noxsavexsavec \ tst-hwcap-tunables \ # tests tests-static += \ @@ -91,6 +94,22 @@ CFLAGS-tst-gnu2-tls2.c += -msse CFLAGS-tst-gnu2-tls2mod0.c += -msse2 -mtune=haswell CFLAGS-tst-gnu2-tls2mod1.c += -msse2 -mtune=haswell CFLAGS-tst-gnu2-tls2mod2.c += -msse2 -mtune=haswell + +LDFLAGS-tst-gnu2-tls2-x86-noxsave += -Wl,-z,lazy +LDFLAGS-tst-gnu2-tls2-x86-noxsavec += -Wl,-z,lazy +LDFLAGS-tst-gnu2-tls2-x86-noxsavexsavec += -Wl,-z,lazy + +# Test for bug 32810: incorrect XSAVE state size if XSAVEC is disabled +# via tunable. +tst-gnu2-tls2-x86-noxsave-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVE +tst-gnu2-tls2-x86-noxsavec-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC +tst-gnu2-tls2-x86-noxsavexsavec-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVE,-XSAVEC +$(objpfx)tst-gnu2-tls2-x86-noxsave.out \ +$(objpfx)tst-gnu2-tls2-x86-noxsavec.out \ +$(objpfx)tst-gnu2-tls2-x86-noxsavexsavec.out: \ + $(objpfx)tst-gnu2-tls2mod0.so \ + $(objpfx)tst-gnu2-tls2mod1.so \ + $(objpfx)tst-gnu2-tls2mod2.so endif ifeq ($(subdir),math) diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 6dfb112038..6cf7e4caf1 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -84,6 +84,8 @@ extern void TUNABLE_CALLBACK (set_x86_shstk) (tunable_val_t *) # include #endif +unsigned long int _dl_x86_features_tlsdesc_state_size; + static void update_active (struct cpu_features *cpu_features) { @@ -318,6 +320,7 @@ update_active (struct cpu_features *cpu_features) = xsave_state_full_size; cpu_features->xsave_state_full_size = xsave_state_full_size; + _dl_x86_features_tlsdesc_state_size = xsave_state_full_size; /* Check if XSAVEC is available. */ if (CPU_FEATURES_CPU_P (cpu_features, XSAVEC)) @@ -406,11 +409,9 @@ update_active (struct cpu_features *cpu_features) = ALIGN_UP ((amx_size + TLSDESC_CALL_REGISTER_SAVE_AREA), 64); - /* Set xsave_state_full_size to the compact AMX - state size for XSAVEC. NB: xsave_state_full_size - is only used in _dl_tlsdesc_dynamic_xsave and - _dl_tlsdesc_dynamic_xsavec. */ - cpu_features->xsave_state_full_size = amx_size; + /* Set TLSDESC state size to the compact AMX + state size for XSAVEC. */ + _dl_x86_features_tlsdesc_state_size = amx_size; #endif cpu_features->xsave_state_size = ALIGN_UP (size + TLSDESC_CALL_REGISTER_SAVE_AREA, diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c index 3423176802..d692e0e0de 100644 --- a/sysdeps/x86/cpu-tunables.c +++ b/sysdeps/x86/cpu-tunables.c @@ -164,6 +164,8 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) /* Update xsave_state_size to XSAVE state size. */ cpu_features->xsave_state_size = cpu_features->xsave_state_full_size; + _dl_x86_features_tlsdesc_state_size + = cpu_features->xsave_state_full_size; CPU_FEATURE_UNSET (cpu_features, XSAVEC); } } diff --git a/sysdeps/x86/dl-diagnostics-cpu.c b/sysdeps/x86/dl-diagnostics-cpu.c index 7d0373602d..870b1268db 100644 --- a/sysdeps/x86/dl-diagnostics-cpu.c +++ b/sysdeps/x86/dl-diagnostics-cpu.c @@ -89,6 +89,8 @@ _dl_diagnostics_cpu (void) cpu_features->xsave_state_size); print_cpu_features_value ("xsave_state_full_size", cpu_features->xsave_state_full_size); + print_cpu_features_value ("tlsdesc_state_full_size", + _dl_x86_features_tlsdesc_state_size); print_cpu_features_value ("data_cache_size", cpu_features->data_cache_size); print_cpu_features_value ("shared_cache_size", cpu_features->shared_cache_size); diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h index 9c485d38ef..fbf1b89110 100644 --- a/sysdeps/x86/include/cpu-features.h +++ b/sysdeps/x86/include/cpu-features.h @@ -935,8 +935,6 @@ struct cpu_features /* The full state size for XSAVE when XSAVEC is disabled by GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC - - and the AMX state size when XSAVEC is available. */ unsigned int xsave_state_full_size; /* Data cache size for use in memory and string routines, typically @@ -990,6 +988,13 @@ extern const struct cpu_features *_dl_x86_get_cpu_features (void) #define __get_cpu_features() _dl_x86_get_cpu_features() +#if IS_IN (rtld) || IS_IN (libc) +/* XSAVE/XSAVEC state size used by TLS descriptors. Compared to + xsave_state_size from struct cpu_features, this includes additional + registers. */ +extern unsigned long int _dl_x86_features_tlsdesc_state_size attribute_hidden; +#endif + #if defined (_LIBC) && !IS_IN (nonlib) /* Unused for x86. */ # define INIT_ARCH() diff --git a/sysdeps/x86/tst-gnu2-tls2-x86-noxsave.c b/sysdeps/x86/tst-gnu2-tls2-x86-noxsave.c new file mode 100644 index 0000000000..f0024c143d --- /dev/null +++ b/sysdeps/x86/tst-gnu2-tls2-x86-noxsave.c @@ -0,0 +1 @@ +#include diff --git a/sysdeps/x86/tst-gnu2-tls2-x86-noxsavec.c b/sysdeps/x86/tst-gnu2-tls2-x86-noxsavec.c new file mode 100644 index 0000000000..f0024c143d --- /dev/null +++ b/sysdeps/x86/tst-gnu2-tls2-x86-noxsavec.c @@ -0,0 +1 @@ +#include diff --git a/sysdeps/x86/tst-gnu2-tls2-x86-noxsavexsavec.c b/sysdeps/x86/tst-gnu2-tls2-x86-noxsavexsavec.c new file mode 100644 index 0000000000..f0024c143d --- /dev/null +++ b/sysdeps/x86/tst-gnu2-tls2-x86-noxsavexsavec.c @@ -0,0 +1 @@ +#include diff --git a/sysdeps/x86_64/dl-tlsdesc-dynamic.h b/sysdeps/x86_64/dl-tlsdesc-dynamic.h index 9965ddd2c0..4f496de8c8 100644 --- a/sysdeps/x86_64/dl-tlsdesc-dynamic.h +++ b/sysdeps/x86_64/dl-tlsdesc-dynamic.h @@ -99,7 +99,7 @@ _dl_tlsdesc_dynamic: # endif #else /* Allocate stack space of the required size to save the state. */ - sub _rtld_local_ro+RTLD_GLOBAL_RO_DL_X86_CPU_FEATURES_OFFSET+XSAVE_STATE_FULL_SIZE_OFFSET(%rip), %RSP_LP + sub _dl_x86_features_tlsdesc_state_size(%rip), %RSP_LP #endif /* Besides rdi and rsi, saved above, save rcx, rdx, r8, r9, r10 and r11. */