Message-ID: <54C54FAC.3020602@sbcglobal.net>
Date: Sun, 25 Jan 2015 12:18:52 -0800
From: Girvin Herr <girvin DOT herr AT sbcglobal DOT net>
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To: geda-user AT delorie DOT com
Subject: Re: [geda-user] Print layout hangs
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On 01/25/2015 10:09 AM, miloh wrote:
> I've encountered similar behavior that could be related: I submitted a 
> bug on it but never followed up to show reproducibility: 
> https://bugs.launchpad.net/pcb/+bug/1242828
>
> My copy of geda-pcb occasionally segfaults when attempting geda-pcb 
> export to ps, which results in truncated postscript output. When it 
> happened recently it looked like it came down to polygons that were 
> overlapping vias. Perhaps there are recoverable errors that scramble 
> ps export without a segfault.
>
> The behavior went away after removing polygons that looked like they 
> underlapping a via/pin. I didn't investigate it more but there's a 
> reasonable record in the commit history of the project that caused the 
> trouble at:
> https://bitbucket.org/miloh/backplanebreakout/commits/all?search=5d8efdc
>
>
> dpkg --status pcb-common
> Source: pcb
> Version: 20110918-7
> Config-Version: 20110918-7
>
>
> -r. miloh
Miloh,
Thanks for your suggestions.  I am not aware of any polygons in my 
simple layout, however, there may be something similar going on.  I have 
not encountered any segfaults in the program.  It just continues on as 
if all is well, but the resulting PS file hangs the CUPS printing past 
page 6.  I do know I have a couple of part outline silkscreens that 
overlap a bit.  I will keep this in mind as I troubleshoot this 
problem.  My next step is to copy my layout to a temporary file and use 
that file to start deleting entities one at a time until this problem 
goes away.  Then I may have an indication of the cause.  I will report 
what I find later.
Thanks again for your response to my problem.
Girvin