X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com Date: Tue, 8 May 2018 07:54:38 +0200 (CEST) X-X-Sender: igor2 AT igor2priv To: "michalwd1979 (michalwd1979 AT o2 DOT pl) [via geda-user AT delorie DOT com]" X-Debug: to=geda-user AT delorie DOT com from="gedau AT igor2 DOT repo DOT hu" From: gedau AT igor2 DOT repo DOT hu Subject: Re: Odp: Re: [geda-user] Opengl PCB and mainline PCB - pcb-rnd aspects In-Reply-To: <7e30777e38284644814271a68f2c2119@grupawp.pl> Message-ID: References: <647dca2ad89a4415ad980da6e5cdc701 AT grupawp DOT pl> <7da892c189bd49838d6ce6eb2c2628e4 AT grupawp DOT pl> <7e30777e38284644814271a68f2c2119 AT grupawp DOT pl> User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk Hello Michael, On Mon, 7 May 2018, michalwd1979 (michalwd1979 AT o2 DOT pl) [via geda-user AT delorie DOT com] wrote: >Adrian, pleas find the board attached. This is a RF board, so it is bloated >with vias and polygons. It was created with my local patched opengl pcb >version, with 8 routing styles and solid thermals on pads. Very nice board! I see a few oddities. I ask about them to understand your use case better and to make sure these are not .pcb import bugs in pcb-rnd. I see you did an interesting RF construct (wilkinson splitter?) at RU200. With subcircuits that sort of things could be done much simpler, as you don't need to use overlapping pads, just plain old copper polygons. We don't yet support subcircuit-in-subcircuit, but that's not far away either, and then you could have R221 really be part of RU200. Do you have R221 as a different symbol on the schematics or is it a hidden part of RU200? Would hierarchical netlists change how you do this? I am not sure about two aspects of RU200: it seems you have paste on these large pads that are drawn instead of polygons, which looks like a bug to me. Then the mask cutout follow these pads closely - I have no experience with RF, but I though you'd either want a full mask cover or remove mask from the whole area of the board (as in a 10x15 mm rectangular mask opening over RU200). I see some strange layers in the file, layers called "bottom solder mask" and "top solder mask". These are after the silk layers, which looks to me as violation of the old format that required silks to be the last two layers. These layers are also not part of the layer groups. Is this some special feature of Peter's branch? Strange, because neither the FileVersion nor the pcb release comment suggests the file format is different. It seems pcb-4.0.0 ignores these layers. (Btw, in pcb-rnd we have editable mask and paste layers and mask, paste, silk can feature both positively and negatively drawn objects so if you used these layers to draw mask cutouts, that can be done. They are less hackish in pcb-rnd: they are explicit part of the layer stackup). I see your vias. A lot of them. (As expected.) Must have been fun to place them. I plan to add a feature in pcb-rnd (don't yet know when): extended objects. It will be able to do a lot of things, from plugins, but one of the first examples I want to do is a "line of vias". It would behave like a line, you would be able to edit it like a line, grab the endpoints, grab the whole line, copy or delete it at once; but on the board it would place a line of evenly spaced vias. I guess that'd speed up drawing wave guides or those vias around the edge of your board. Would such a feature make your life easier? Regards, Igor2