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From: "Svenn Are Bjerkem (svenn DOT bjerkem AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Subject: Re: [geda-user] Can an attribute be attached to text for later
 inclusion in gnetlist backend?
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On 24 August 2016 at 20:58, Vladimir Zhbanov (vzhbanov AT gmail DOT com) [via
geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
> Of course, you might your own backend for personal use. However,
> if such a change is useful for you and harmless for others, why to
> not have it?

Hi Vladimir,
I think the vhdl backend is kind of unfinished. The vams backend
example in gnetlist directory does not work out of the box.
I have so many thoughts about how gschem/gnetlist can help me organize
"throwaway" testbenches for my vhdl design, but it is all a side
project to my daily work.
I am working on my own version of a vhdl back-end, but I am not very
far at the moment. Learning.
Also thinking on how to use std_logic_vectors (buses) and component
ports with more than on signal/wire (bus ports). (John Doty, I think,
once said that this must be handled in the back-end based on some
software logic in the back-end)

I appreciate your code suggestion. I think that piece of code would be
a nice replacement in both vhdl and vams backend.

I am also looking into choosing top-level attribute names which will
work the same accross vhdl, verilog and vams backends so that the
schematic can be used with little modification on different types of
simulators.

My main target is to just create top-level block-type schematics. I am
not sure gnetlist could handle a "real" hierarchical design. I know
too little about its capabilities.

-- 
Svenn