X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Ironport-SBRS: None X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A2EwBQDSi6dW/52AA4BegzqKFrQLhg8CgUQ8EAEBAQEBAQEDgQeEQgEBBDpPCxgJExIPBYh3Bb5fAQEIAh6GMoRthReCYIEPBY4hiFiNTY8CjkM3K4IBGIFxG4hyAQEB X-IronPort-AV: E=Sophos;i="5.22,350,1449561600"; d="scan'208";a="12184586" Date: Tue, 26 Jan 2016 07:13:43 -0800 From: Larry Doolittle To: geda-user AT delorie DOT com Subject: Re: [geda-user] [pcb] poll: burried/blind vias vs. pcb and pcb-rnd Message-ID: <20160126151343.GA23222@recycle.lbl.gov> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk On Tue, Jan 26, 2016 at 07:46:36AM +0100, Kai-Martin Knaak wrote: > That said, blind vias are a necessity with any FPGA beyond the > smallest size. So the absence of this feature puts a cap to what is > possible within the realm of geda. Yes, for the largest FPGAs. In the mid-size range, it's not so much the number of FPGA (BGA) pins, it's their spacing. 1.0 or 0.8mm ball pitch is not a big deal with normal vias, but the ever-more-common 0.5mm balls are not possible. For those you need microvias, a particular configuration of blind vias. - Larry