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 Fri, 05 Jun 2015 16:52:33 -0700 (PDT)
Date: Fri, 5 Jun 2015 15:52:33 -0800
Message-ID: <CAC4O8c85wrijjXPsj3wa_aDQdh8SLemnwDK_rwLPHam-Jce2RQ@mail.gmail.com>
Subject: [geda-user] how to avoid 'Cant find PINLABEL pin1 called for in netlist'?
From: "Britton Kerin (britton DOT kerin AT gmail DOT com)" <geda-user AT delorie DOT com>
To: geda-user AT delorie DOT com
Content-Type: text/plain; charset=UTF-8
Reply-To: geda-user AT delorie DOT com

For hierarchical design, I use an io symbol containing a pin with pinnumber
and pinseq attributes for each point where a connection to the subcircuit
is intended.  In the subcircuit schematic, that symbol then gets pinlabel
and refdes attributes set to the desired PINLABEL, and I create a subcircuit
symbol containing pins with a matching PINLABEL attribute (and appropriate
source attribute) for use in the main circuit.

It all works but PCB ends up complaining:

     'Cant find PINLABEL pin1 called for in netlist'

This makes me sad because I don't ever get to see PCB congratulate me on my
completed layout :/

What is the simple way to avoid this problem?

Thanks,
Britton