X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com Message-ID: <52B0214C.8030700@envinsci.co.uk> Date: Tue, 17 Dec 2013 10:02:52 +0000 From: Matt Rhys-Roberts Organization: Envin Scientific Ltd. User-Agent: Mozilla/5.0 (X11; Linux i686; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 MIME-Version: 1.0 To: geda-user AT delorie DOT com Subject: [geda-user] pcb: solder mask clearance in DRC? Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: geda-user AT delorie DOT com Hi all, Is it possible to somehow cause the DRC to flag up when solder mask clearance is too small for manufacture? I have inherited several SO8 footprints to choose from, and I didn't notice that the one I picked had barely any SM clearance around the pads. This cost us an extra 5% when the board makers detected it was outside the standard specs for their process. No blame, just nice to see this added to the next generation DRC. Any comments please? Regards, Matt RR.