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Date: Sun, 27 Oct 2013 20:05:41 -0500
From: John Griessen <john AT ecosensory DOT com>
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To: geda-user AT delorie DOT com
Subject: Re: [geda-user] Power to ICs with numslots > 1
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Reply-To: geda-user AT delorie DOT com

On 10/27/2013 01:51 PM, Peter Clifton wrote:
> IMO, connecting the hierarchy explicitly is superior (and less prone to
> errors) than trying to use flat net-names across the whole design.

Yes, me too, and that matches my old chip design experience, where reusing a block never depended
on names internal to it. (I mention chip design because it is very virtual/nit-picky and
mistakes in physical chips very expensive).