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Date:	Wed, 21 Nov 2018 12:53:48 +0100 (CET)
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To:	"Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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From:	gedau AT igor2 DOT repo DOT hu
Subject:	Re: [geda-user] Suppressing RefDes silk screen in PCB (Gerber)
	export?
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Hi Richard,

On Wed, 21 Nov 2018, Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com] wrote:

> Hello,
>
> In these cases, I usually place the RefDes in the middle of components,
> overlapping the solder pads, so that I still have a good overview of what I'm
> doing while designing the PCB.

<snip>

> My question: is there a way to suppress the RefDes in the exported Gerber
> files? In the View -> Displayed Element Name menu, PCB offers to show the
> RefDes, the value or the description (footprint) of the component, but no
> option 'none'.
>
> Any other thoughts on this are welcome too, of course.

If I get it right, you do not want the refdes on the actual board silk at 
all, but you have to keep it while drawing the board, for monitor display 
reasons.

Solution in pcb-rnd: we decoupled screen display from board data. You can 
display refdes (and/or any other attribute^1) of subcircuits on a 
subcircuit layer that is dsplayed only on your monitor but never ends up 
in gerber or other exports. This way the board file contains exactly what 
the board will, at the end: no refdes text on the silk layer if you don't 
need it.

So in short: you don't need to abuse the silk layer for screen display 
purposes.

HTH,

Igor2



footnote: 

^1 I often get it also display the value and tolerance, for building the 
board. Although recently we have a new GUI dialog that can group parts and 
assist bulding the board, displaying all relevant attributes in a 
configurable way so this use case is probably less important now.

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