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Date:	Sun, 2 Apr 2017 23:59:28 -0400
From:	al davis <ad252 AT freeelectron DOT net>
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Subject:	Re: [geda-user] Gnucap and Google summer of code.
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On Thu, 30 Mar 2017 19:20:40 +0200 (CEST)
gedau AT igor2 DOT repo DOT hu wrote:
> Do you have a file format spec you'd prefer? If it's about exporting 
> geometry from pcb-rnd, it's not very hard, I am sure we could get it done 

The structural subset of Verilog, using these guidelines for conveying
layout info within the format.

http://gnucap.org/dokuwiki/doku.php?id=gnucap:user:netlist_import_and_export

It doesn't say how to express things like stackup and vias.  Trace
parameters like layers, thickness, width, and length are parameters to
the "net".  If a net is not all on the same layer, the complex net can
be encapsulated, as introduced toward the end.

I know this is not enough to catch every detail.  This is the first
one, and we need to experiment a little.

The first step is to document specifically what the conversion needs to
do, how one format is mapped to the other (and back again).

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