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Mail Archives: geda-user/2017/03/14/15:15:33

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Date: Tue, 14 Mar 2017 20:17:02 +0100 (CET)
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To: "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Subject: Re: [geda-user] [pcb-rnd] tEDAx footprint load support
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On Tue, 14 Mar 2017, Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com] wrote:

> A good initiative but I also have some suggestions:

Thanks. Please note that tEDAx is not trying to grasp every detail that 
exists for a perfect footprint. It tries to provide a minimal set of 
features to deliver an already usable footprint. In return, it's small, 
simple and easy to implement. It's a tradeoff. I am trying to achieve a 
local optimum.

(There are other formats that go for another local optimum: not small or 
easy to describe, but care about all possible details. Those are already 
invented, I am not trying to reinvent those with tEDAx).

>  - Holes without plating is common.

Common, but not essential. The same footprint could work fine with plated 
holes. I simply didn't want to introduce another detail that may not be 
implemented in smaller EDA software.

>  - A hole is usually thru all layers but it might be useful to restrict as for objects.

If you mean blind/buried (not thru-hole), that's intentionally not present 
in tEDAx, for the above reasons. (The layer desc is so simple that we 
don't even have enough details for that).

>  - Is clear really needed, I thought this a ruled applied between or objects in general.

I defined clearance for copper-copper objects. Unlike plated/unplated, I 
felt like this parameter can make a difference - but I'm not 100% sure 
yet. (By the way, an implementor may ignore this parameter if their EDA 
doesn't support clearance and/or polygons.)

Question (to all PCB engineers): how often do you rely on the clearance 
value set in a footprint?

Regards,

Igor2

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