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| From: | "John Luciani (jluciani AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
| Date: | Wed, 18 Jan 2017 07:03:51 -0500 |
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| Subject: | Re: [geda-user] QFN packages solder mask |
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--001a1140d76ac82b2605465d3511 Content-Type: text/plain; charset=UTF-8 What type of stencil openings are you using? For the thermal pads I typical reduce the coverage to between 50 - 70% (depending on the aperature dimensions). The reduction is done using a layout similar to your footprint. The spacing between the paste areas provides the channels. I also reduce the coverage on the electrical pads. John L On Tue, Jan 17, 2017 at 11:58 PM, John Griessen (john AT ecosensory DOT com) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote: > On 01/17/2017 10:00 PM, Dan McMahill (dan AT mcmahill DOT net) [via > geda-user AT delorie DOT com] wrote: > >> I've been making footprints for QFN packages and came across guidelines >>> by the chip makers that say >>> it is beneficial to have some solder mask under the edge of the QFN >>> package, but not if it gets too thin >>> anywhere, as it can come off and cause trouble if it is. >>> >> >> I don't have great suggestions about the soldermask bit. Did you look at >> the QFN footprints in the ~geda library? I thought we >> had a decent coverage of packages but it has been a while since I looked. >> > > When you dig into the docs about what I saw at first, it seems like solder > mask under the edge of the QFN > package could be a negative or a plus. They suggest all the gaps between > paste areas and metal areas to make channels > that volatile gas can escape from during reflowing. So there are not > bubbles left in the solder. > > So, the basic shapes we have from footprint generators are OK really. > > Vias in a center pad can be a minus if they pull out too much solder, but > they are > a help against bubbles forming, and they're needed to connect any separate > pads > for current flow. The goal is often heat flow also, and vias help with > that a lot. > > Now I'm more confused than when I started reading about it. > -- http://www.wiblocks.com --001a1140d76ac82b2605465d3511 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable <div dir=3D"ltr"><div><div><div><div><div><div>What type of stencil opening= s are you using?<br><br></div>For the thermal pads I typical reduce the cov= erage to<br></div>between 50 - 70% (depending on the aperature dimensions).= <br></div>The reduction is done using a layout similar to your footprint.<b= r></div><div>The spacing between the paste areas provides the channels.<br>= </div><div><br></div>I also reduce the coverage on the electrical pads. <br= ><br></div>John L<br></div><div><div><br><br><br><div><br><br></div></div><= /div></div><div class=3D"gmail_extra"><br><div class=3D"gmail_quote">On Tue= , Jan 17, 2017 at 11:58 PM, John Griessen (<a href=3D"mailto:john AT ecosensor= y.com">john AT ecosensory DOT com</a>) [via <a href=3D"mailto:geda-user AT delorie DOT co= m">geda-user AT delorie DOT com</a>] <span dir=3D"ltr"><<a href=3D"mailto:geda-= user AT delorie DOT com" target=3D"_blank">geda-user AT delorie DOT com</a>></span> wr= ote:<br><blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border= -left:1px #ccc solid;padding-left:1ex"><span class=3D"">On 01/17/2017 10:00= PM, Dan McMahill (<a href=3D"mailto:dan AT mcmahill DOT net" target=3D"_blank">da= n AT mcmahill DOT net</a>) [via <a href=3D"mailto:geda-user AT delorie DOT com" target=3D= "_blank">geda-user AT delorie DOT com</a>] wrote:<br> <blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1p= x #ccc solid;padding-left:1ex"><blockquote class=3D"gmail_quote" style=3D"m= argin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> I've been making footprints for QFN packages and came across guidelines= <br> by the chip makers that say<br> it is beneficial to have some solder mask under the edge of the QFN<br> package, but not if it gets too thin<br> anywhere, as it can come off and cause trouble if it is.<br> </blockquote> <br> I don't have great suggestions about the soldermask bit.=C2=A0 Did you = look at the QFN footprints in the ~geda library?=C2=A0 I thought we<br> had a decent coverage of packages but it has been a while since I looked.<b= r> </blockquote> <br></span> When you dig into the docs about what I saw at first, it seems like solder = mask under the edge of the QFN<br> package could be a negative or a plus.=C2=A0 They suggest all the gaps betw= een paste areas and metal areas to make channels<br> that volatile gas can escape from during reflowing.=C2=A0 So there are not = bubbles left in the solder.<br> <br> So, the basic shapes we have from footprint generators are OK really.<br> <br> Vias in a center pad can be a minus if they pull out too much solder, but t= hey are<br> a help against bubbles forming, and they're needed to connect any separ= ate pads<br> for current flow.=C2=A0 The goal is often heat flow also, and vias help wit= h that a lot.<br> <br> Now I'm more confused than when I started reading about it.<br> </blockquote></div><br><br clear=3D"all"><br>-- <br><div class=3D"gmail_sig= nature" data-smartmail=3D"gmail_signature"><a href=3D"http://www.wiblocks.c= om" target=3D"_blank">http://www.wiblocks.com</a> =C2=A0</div> </div> --001a1140d76ac82b2605465d3511--
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