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Mail Archives: geda-user/2016/01/06/07:22:42

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Date: Wed, 6 Jan 2016 12:22:33 +0000
Message-ID: <CAJXU7q-ygqW+Jok60vHC1dre9Q0aF4cUo8_5KXvouTW3L5c57A@mail.gmail.com>
Subject: Re: [geda-user] A fileformat library
From: "Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: gEDA User Mailing List <geda-user AT delorie DOT com>
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On 6 Jan 2016 11:50, <gedau AT igor2 DOT repo DOT hu> wrote:
>

> I think this is a common misunderstanding. The reason PCB doesn't support
burried/blind via is like 5% file format and 95% all-internal-code-in-pcb.
(The 5-95 split is an educated guess, not a fact, but I believe it's not
far from reality). The 95% includes everything from find.c and DRC to
export HIDs and GUI HIDs.
>
> If we want blind/burried vias, we'll need to find how it is to be
represented in a save file eventually, but the bulk of the work won't be
around that part.

Indeed, although it realistically isn't actally that huge a task from the
data point of view. The most obvious missing thing I can see, is a physical
layer stack model. Pcb layers don't explicitly map 1-1 to physical layers -
and at the very least, we need to inforce a defined ordering of layer
groups, before a to-from layer group notion makes sense. (I sort of did
this in the 3D branch, but it needs to be more explicit).

What may be a little harder, is updating the gui and renders to give a
sensible interface for creating and editing this type of design feature.

Since it blocks the 3D stuff, I'm taking an interest here (regarding more
explicit board construction info / layer stack description), and I have
plans to address this.

I will also put my hand up to do the blind / buried vias, at least the back
end part, and possibly a basic gui implementation in one HID - unless
anyone is desperate to beat me to it!

Peter

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<p dir=3D"ltr"><br>
On 6 Jan 2016 11:50, &lt;<a href=3D"mailto:gedau AT igor2 DOT repo DOT hu">gedau AT igor2=
.repo.hu</a>&gt; wrote:<br>
&gt;</p>
<p dir=3D"ltr">&gt; I think this is a common misunderstanding. The reason P=
CB doesn&#39;t support burried/blind via is like 5% file format and 95% all=
-internal-code-in-pcb. (The 5-95 split is an educated guess, not a fact, bu=
t I believe it&#39;s not far from reality). The 95% includes everything fro=
m find.c and DRC to export HIDs and GUI HIDs.<br>
&gt;<br>
&gt; If we want blind/burried vias, we&#39;ll need to find how it is to be =
represented in a save file eventually, but the bulk of the work won&#39;t b=
e around that part.<br></p>
<p dir=3D"ltr">Indeed, although it realistically isn&#39;t actally that hug=
e a task from the data point of view. The most obvious missing thing I can =
see, is a physical layer stack model. Pcb layers don&#39;t explicitly map 1=
-1 to physical layers - and at the very least, we need to inforce a defined=
 ordering of layer groups, before a to-from layer group notion makes sense.=
 (I sort of did this in the 3D branch, but it needs to be more explicit).</=
p>
<p dir=3D"ltr">What may be a little harder, is updating the gui and renders=
 to give a sensible interface for creating and editing this type of design =
feature.</p>
<p dir=3D"ltr">Since it blocks the 3D stuff, I&#39;m taking an interest her=
e (regarding more explicit board construction info / layer stack descriptio=
n), and I have plans to address this.</p>
<p dir=3D"ltr">I will also put my hand up to do the blind / buried vias, at=
 least the back end part, and possibly a basic gui implementation in one HI=
D - unless anyone is desperate to beat me to it!</p>
<p dir=3D"ltr">Peter<br>
</p>

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