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Mail Archives: geda-user/2015/08/17/22:06:43

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Subject: Re: [geda-user] high freq, trace lengths
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From: "Dan McMahill (dan AT mcmahill DOT net) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Date: Mon, 17 Aug 2015 22:05:44 -0400
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On 7/27/2015 10:04 AM, gedau AT igor2 DOT repo DOT hu wrote:
>
>
> On Mon, 27 Jul 2015, Ouabache Designworks (z3qmtr45 AT gmail DOT com) [via
> geda-user AT delorie DOT com] wrote:
>
>> What we need is a tool that can extract a spice model of the PCB from the
>> layout but I suspect that is beyond the scope for a open source project.
>
> Beyond my scope but not because open source but because I have no idea
> how to do it. We could team up: you do all the math and build test cases
> and I do the code.
>

There are many different goals which may be associated with "can extract 
a spice model".  Models for explicit transmission lines with some 
discontinuities can be good for point to point wiring of high frequency 
signals.  You may just want a capacitance matrix that gives a single 
lumped capacitance from each piece of connected metal to each other 
piece.  Do you care about resistance?  Sometimes.  How about inductance? 
Again, the answer is sometimes.

In the case of just capacitance, there is Nelma, 
https://www.tablix.org/~avian/nelma/, and PCB already can produce an 
input file.  However, Nelma uses some algorithms which are O(n^3) in 
time so it is not clear how complex of a layout it can handle.

http://www.mit.edu/~yuchsiao/caplet/ may have some useful ideas.  It is 
optimized for manhattan geometries which could be problematic.  GDS2 is 
to IC layout as Gerber is to board layout for those who don't know.

High capacity capacitance extractors which run on IC layouts (and that 
can handle extremely complex layouts, way way more complex than a 
circuit board) tend to use a lookup table approach.  They run a field 
solver on several cases and then simplify the real layout to match one 
of these simplified cases and then just interpolate between the points 
that the field solver has found.  This removes any iterative field 
solving from the user run time.  The result is less accurate but you can 
get an answer fairly quickly.  For circuit board type complexity, that 
would be really fast.  Some of the inductance extractors work the same 
way.  They basically break everything up into rectangular bars and use 
some known equations and then consider every pair of bars and produce a 
large inductance matrix.

Tools like fastcap and fasthenry (both open source) are true field 
solvers and can handle lower complexity layouts but the real challenge 
is converting an actual layout to the right input format for these 
tools.  Oh, and the other challenge is getting the results back into a 
form that can work with the simulator.


Another open source field solver is MMTL, http://mmtl.sourceforge.net/. 
  However progress has stagnated (at least on the open source side) and 
I think there are bugs in their calcCAP and calcRL programs (I filed 
those a decade ago in their ticket tracker).  Still, for a motivated 
individual, it may be a starting point.

-Dan





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