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Date:	Thu, 19 Feb 2015 20:53:13 +0100
From:	Florian Teply <usenet AT teply DOT info>
To:	geda-user AT delorie DOT com
Subject:	Re: [geda-user] Commonness of internal layer cutouts/cavities?
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Am Sun, 15 Feb 2015 09:08:55 -0500
schrieb Jason White <whitewaterssoftwareinfo AT gmail DOT com>:

> How common are cavities (that is internal cutouts on a PCB specific to
> a single layer) in the electronics world?
> 
Well, for me, that's actually a pretty common thing. But this doesn't
mean anything. Most of these boards I do specifically for some delicate
Chip-on-Board solutions though, where I'm just too lazy to think about
having the silicon packaged, or when I need to adapt between actual die
pinout and package pin assignment. And in these cases, it's either a
plain hole through the whole board (for thin boards) or mechanical
milling to reduce height difference for bonding. On has to make sure
though not to put traces there...

Best regards,
Florian

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