Mail Archives: geda-user/2015/01/18/17:14:45
On Jan 18, 2015, at 12:21 AM, Hagen SANKOWSKI <hsank AT nospam DOT chipforge DOT org> wrote:
>
> I see.. You have one schematic/netlist for every variation, right?
> This was also one of my ideas - and keep it beside. I argued myself
> against this like: "How I can keep other parts (than the variation) of
> my schematic/netlist constistent during the whole development process?"
> It would be a mess of 'diff'ing text files (gschem,spice) all the time.
It can be difficult to use the “spice” or “spice-sdb” back ends with schematics that are intended for printed circuit layout. I use my own back end, available at https://github.com/noqsi/gnet-spice-noqsi. This automatically figures out simple components using spice-sdb heuristics, but it gives you control when those fail.
Another useful trick is to copy the master schematics to the simulation directory. Sometimes simulation involves tinkering that goes beyond what you can do with “alter” in ngspice, but you’d rather not do it directly on the master. In the simulation directory, I have a Makefile with rules like
Booster.sch : ../Schematic/Booster.sch
cp $< $@
to copy the masters into the simulation directory as needed. Of course, if the tinkered file winds up being what I want, I can manually copy it back.
There are also “test fixtures”, schematics that represent parts of the simulation (like power supplies) that aren’t in the physical board design. I also have programs that generate bits of simulation netlist (like 10,000 step PWL sources) that can’t reasonably find representation in a schematic. The Makefile has rules to collect all of these fragments and feed them to ngspice (I’d never be able to remember them all).
John Doty Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd AT noqsi DOT com
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