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Date: | Wed, 28 Aug 2013 10:05:50 +0200 |
From: | myken <myken AT iae DOT nl> |
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To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] Tutorial: VHDL with gEDA |
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On 28/08/13 04:27, Jan wrote: > Does this pin issue effect circuit simulation or is this a separate topic? This pin issue does not effect VHDL generation (circuit simulation is something different). The discussion is about the definition of attributes and how they should be used.
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