Mail Archives: geda-user/2013/08/22/08:20:46
Hello All,
As Peter suggested am I trying to fix the generation of the VHDL symbols.
I have changed the "script.sed" file in the vhdl directory and that one
works.
Now I made a new sed script (scriptpad.sed) to deal with the remaining
symbols.
Within that script I have the command:
/^T.*/ N
s/\(^T.*\)\(pin.*=IPAD\)/&\n\1pintype=IN/
copy/past/adapted from "script.sed"
The result is that after:
T 170 38 5 10 1 1 0 0 1
pinnumber=IPAD
the script copies the first line and add a line with pintype=...
T 170 38 5 10 1 1 0 0 1
pintype=IN
Almost perfect, it is what I want, but since the T 170 ... line is a
copy of the line corresponding with the pinnumber line, the visibility
attribute is set to 1 and that's not what I want. In the schematic IPAD
and IN are printed overlaying.
Can anyone help me solve this? How do I set the 6th attribute of the
copied line to 0?
Resulting in:
T 170 38 5 10 0 1 0 0 1
pintype=IN
Thanks, Robert.
>> Hi Robert,
>>
>> If possible, it would be good if you could fix the generation of the
>> VHDL symbols...
>>
>> Peter
> Yes, I thought of that. Unfortunately it would mean a rather big
> change in the current script. The current script doesn't do much, it
> changes device=and to device=and[2..9], that's it. But to make the
> vhdl library usable more changes are needed.
> Oh well maybe I'll start working on it.
> Is there a verilog library maintainer?
>
> Thanks, Robert
>
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