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From:	Kai-Martin Knaak <kmk AT familieknaak DOT de>
Subject:	Re: [geda-user] Different DRC for internal and external layers
Date:	Sun, 31 May 2015 15:41 +0200
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Message-ID:	<mkf31d$erh$1@ger.gmane.org>
References:	<556A523B DOT 10309 AT lsol DOT ru>
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Maxim Feoktistov (max AT lsol DOT ru) wrote:

> To prepare the board  I has been change source of gEDA PCB, add the
> possibility to direct different minimal  copper width and space for
> internal and external layers and use it for DRC check.
> May be this patch  will helpfull to someone else?
> 
The patch would have been useful for me when I designed a high current 
board. The board had extra thick inner copper layers for which the 
manufacturer required increased minimum distance. Unfortunately, I had 
my layout almost done when I got aware of this. Just setting the DRC 
to the more stringent mid layer constraints did of course swamp the 
output with messages related to top and bottom.

I worked around the problem by copy pasting the mid layer to a 
separate empty layout, do DRC there and paste back.

---<)kaimartin(>---

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