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| X-Recipient: | geda-user AT delorie DOT com |
| Message-ID: | <556A523B.10309@lsol.ru> |
| Date: | Sun, 31 May 2015 03:13:47 +0300 |
| From: | "Maxim Feoktistov (max AT lsol DOT ru)" <geda-user AT delorie DOT com> |
| User-Agent: | Mozilla/5.0 (X11; Linux i686; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 |
| MIME-Version: | 1.0 |
| To: | geda-user AT delorie DOT com |
| Subject: | [geda-user] Different DRC for internal and external layers |
| Reply-To: | geda-user AT delorie DOT com |
Hello!
The board with chips in BGA packages, require very small copper width
and space. Some manufacturer provide different minimal copper width and
space for internal and external layers. (For example my manufacturer
require minimal copper width/copper space 0.1/0.1mm for external
layers and 0.15/0.15mm for internal layers )
To prepare the board I has been change source of gEDA PCB, add the
possibility to direct different minimal copper width and space for
internal and external layers and use it for DRC check.
May be this patch will helpfull to someone else?
Here the path for current git snapshot:
http://geda.lsol.ru/pcb_ext_int_layer.patch
Here gziped binary file that has been build for Ubuntu.
http://geda.lsol.ru/pcb.gz
--
Best regards, Maxim Feoktistov
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